Method and apparatus for reducing wake up time of a powered down device

• US 7,184,799 B1
• Filed: 01/06/2004
• Issued: 02/27/2007
• Est. Priority Date: 05/14/2003
• Status: Expired due to Term

• Current Assignee: Marvell Asia Pte Limited (Marvell Technology Group Limited)
• Original Assignee: Marvell International Limited (Marvell Technology Group Limited)
• Inventors: Tsai, King Chun, Jin, Xiaodong, Song, Yonghua
• Primary Examiner(s): Kincaid; Lester G.
• Assistant Examiner(s): STEPHEN, EMEM O
• Application Number:
  US10/753,101
• Time in Patent Office: 1,148 Days
• Field of Search: 330/285, 330/51, 330/310, 330/311, 330/289, 330272-273, 455/343.2, 455/280, 455/574, 455/572, 455/550.1, 455/73, 455/343, 455/127
• US Class Current: 455/574
• CPC Class Codes: H03F 1/26 Modifications of amplifiers to reduce influence of noise generated by amplifying elements
• CPC Class Codes: H03F 1/30 Modifications of amplifiers to reduce influence of variations of temperature or supply voltage or other physical parameters in differential amplifiers H03F3/45479
• CPC Class Codes: H03F 1/305 in case of switching on or off of a power supply
• CPC Class Codes: H03F 2200/294 the amplifier being a low noise amplifier [LNA]
• CPC Class Codes: H03F 2200/372 Noise reduction and elimination in amplifier
• CPC Class Codes: H03F 2200/453 Controlling being realised by adding a replica circuit or by using one among multiple identical circuits as a replica circuit
• CPC Class Codes: H03F 3/24 of transmitter output stages
• CPC Class Codes: H04B 1/1615 Switching on; Switching off, e.g. remotely battery saving circuits associated with selective call operation H04W52/00; details of power consumption reduction in a PLL, H03L7/0802, H03L7/14, H03L2207/08, H03L2207/18; muting amplifiers by gain control see H03G3/34
• CPC Class Codes: H04W 52/0274 by switching on or off the equipment or parts thereof
• CPC Class Codes: Y02D 30/70 in wireless communication networks

Abstract

A dummy circuit is provided to which a bias circuit of a low noise amplifier (LNA) can be coupled to during power down of the LNA. The dummy circuit maintains the bias circuit at an approximately normal operating state to reduce wake up time of the LNA.

Claims

1. A wireless transceiver, comprising:

an amplifier configured to receive an input RF signal, the amplifier including a biasing system;

the biasing system including,

a low noise amplifier (LNA) to amplify the input RF signal;

a bias circuit configured to provide a bias output to the LNA during a time the LNA is operating in a first mode;

a circuit configured to maintain the bias circuit in an operating state during a time the LNA is operating in a power down mode; and

a switch circuit configured to switch the bias output from the LNA to the circuit when the LNA is powered down from the first mode to the power down mode.

2. The wireless transceiver of claim 1, wherein the circuit is operational only when the LNA is operating in the power down mode.

3. The wireless transceiver of claim 1, wherein the bias output is a bias current.

4. The wireless transceiver of claim 1, wherein the bias output is a bias voltage.

5. The wireless transceiver of claim 1, wherein the circuit is configured to maintain a lead to the bias circuit at a predetermined operating voltage level during a time the LNA is operating in the power down mode.

6. The wireless transceiver of claim 1, wherein the LNA consumes less power when operating in the power down mode than when the LNA is operating in the first mode.

7. The wireless transceiver of claim 1, wherein the wireless transceiver is compliant with an IEEE standard selected from the group consisting of 802.11, 802.11a, 802.11b, 802.11e, 802.11g, 802.11h, and 802.11i, and 802.14.

8. A wireless transceiver, comprising:

receiving means for receiving an input RF signal, the receiving means including a biasing system;

the biasing system including,

amplifying means for amplifying the input RF signal;

biasing means for providing a bias output to the amplifying means during a time the amplifying means is operating in a first mode;

maintaining means for maintaining the biasing means in an operating state during a time the amplifying means is operating in a power down mode; and

switching means for switching the bias output from the amplifying means to the maintaining means when the amplifying means is powered down from the first mode to the power down mode.

9. The wireless transceiver of claim 8, wherein the maintaining means is operational only when the amplifying means is operating in the power down mode.

10. The wireless transceiver of claim 8, wherein the bias output is a bias current.

11. The wireless transceiver of claim 8, wherein the bias output is a bias voltage.

12. The wireless transceiver of claim 8, wherein the maintaining means is configured to maintain a lead to the biasing means at a predetermined operating voltage level during a time the amplifying means is operating in the power down mode.

13. The wireless transceiver of claim 8, wherein the amplifying means consumes less power when operating in the power down mode than when the amplifying means is operating in the first mode.

14. The wireless transceiver of claim 8, wherein the wireless transceiver is compliant with an IEEE standard selected from the group consisting of 802.11, 802.11a, 802.11b, 802.11e, 802.11g, 802.11h, and 802.11i, and 802.14.

15. A biasing system for biasing a main circuit configured to operate in a first mode and a power down mode, the biasing system comprising:

a circuit configured to maintain a bias circuit in an operating state during a time a main circuit is operating in a power down mode; and

a switch circuit configured to switch a bias output of the bias circuit from the main circuit to the circuit when the main circuit is powdered down from the first mode to the power down mode.

16. The biasing system of claim 15, further comprising the bias circuit configured to provide the bias output to the main circuit during a time the main circuit is operating in the first mode.

17. The biasing system of claim 15, wherein the bias output is a bias current.

18. The biasing system of claim 15, wherein the bias output is a bias voltage.

19. The biasing system of claim 15, wherein the main circuit consumes less power when operating in the power down mode than when the main circuit is operating in the first mode.

20. The biasing system of claim 15, wherein the circuit is configured to maintain a lead to the bias circuit at a predetermined operating voltage level during a time the main circuit is operating in the power down mode.

21. The biasing system of claim 15, wherein the main circuit is a LNA.

22. A biasing system for biasing a main circuit configured to operate in a first mode and a power down mode, the biasing system comprising:

maintaining means for maintaining a bias circuit in an operating state during a time a main circuit is operating in a power down mode; and

switching means for switching a bias output of the bias circuit from the main circuit to the maintaining means when the main circuit is powered down from the first mode to the power down mode.

23. The biasing system of claim 22, further comprising the bias circuit configured to provide the bias output to the main circuit during a time the main circuit is operating in the first mode.

24. The biasing system of claim 22, wherein the bias output is a bias current.

25. The biasing system of claim 22, wherein the bias output is a bias voltage.

26. The biasing system of claim 22, wherein the main circuit consumes less power when operating in the power down mode than when the main circuit is operating in the first mode.

27. The biasing system of claim 22, wherein the maintaining mans maintains a lead to the bias circuit at a predetermined operating voltage level during a time the main circuit is operating in the power down mode.

28. The biasing system of claim 22, wherein the main circuit is a LNA.