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Atomic update of CPO state

  • US 7,185,183 B1
  • Filed: 08/02/2001
  • Issued: 02/27/2007
  • Est. Priority Date: 08/02/2001
  • Status: Expired due to Term
First Claim
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1. A microprocessor having a control register that is atomically modifiable by a privileged (kernel) instruction, the control register having bit fields, the microprocessor comprising:

  • a core, for receiving the privileged instruction and for atomically modifying the control register upon execution of the privileged instruction, wherein the control register is not accessible when the microprocessor is executing unprivileged instructions;

    the privileged instruction comprising;

    an opcode, for identifying the instruction as a privileged instruction;

    a first operand, for specifying the control register as a register to be modified; and

    a second operand, for specifying a location of a second register within the microprocessor, said second register containing a bit mask, said bit mask determining which of the bit fields within the control register are to be modified;

    wherein said bit mask is used to atomically set or clear the bit fields in the control register;

    whereby the bit fields in the control register are modified atomically by the privileged instruction.

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