LDPC (low density parity check) coded modulation hybrid decoding
First Claim
1. A decoder that is operable to perform hybrid decoding of an LDPC (Low Density Parity Check) coded modulation signal, the decoder comprising:
- a symbol sequence estimate and symbol node update functional block that receives a plurality of symbol metrics corresponding to a symbol of a plurality of symbols of the LDPC coded modulation signal and also receives a plurality of initialized LLR (log likelihood ratio) bit edge messages;
wherein;
the plurality of bit edge messages corresponds to a plurality of edges that communicatively couple a plurality of symbol nodes to a plurality of check nodes within an LDPC coded modulation bipartite graph that corresponds to an LDPC code;
the symbol sequence estimate and symbol node update functional block computes a first plurality of possible soft symbol estimates for the symbol;
the symbol sequence estimate and symbol node update functional block updates the plurality of bit edge messages using the plurality of symbol metrics and the plurality of initialized LLR bit edge messages thereby generating a first updated plurality of bit edge messages;
a check node update functional block that updates a plurality of check edge messages using the first updated plurality of bit edge messages thereby generating a first updated plurality of check edge messages;
wherein;
the symbol sequence estimate and symbol node update functional block computes a second plurality of possible soft symbol estimates for the symbol using the first updated plurality of check edge messages;
the symbol sequence estimate and symbol node update functional block updates the first updated plurality of bit edge messages using the received plurality of symbol metrics and the first updated plurality of check edge messages thereby generating a second updated plurality of bit edge messages;
during a last iterative decoding iteration, the symbol sequence estimate and symbol node update functional block makes a best estimate for the symbol of the plurality of symbols of the LDPC coded modulation signal using that symbol'"'"'s most recent corresponding plurality of possible soft symbol estimates; and
a hard limiter makes bit estimates based on the best estimate for the symbol such that the bit estimates are hard decisions for each of the individual bits of the symbol.
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Abstract
LDPC (Low Density Parity Check) coded modulation hybrid decoding. A novel approach is presented wherein a combination of bit decoding and symbol level decoding (e.g., hybrid decoding) is performed for LDPC coded signals. Check node updating and symbol node updating are successively and alternatively performed on bit edge messages for a predetermined number of decoding iterations or until a sufficient degree of precision is achieved. The symbol node updating of the bit edge messages involves using symbol metrics corresponding to the symbol being decoded as well as the bit edge messages most recently updated by check node updating. The check node updating of the bit edge messages involves using the bit edge messages most recently updated by symbol node updating. The symbol node updating also involves computing possible soft symbol estimates for the symbol during each decoding iteration.
18 Citations
34 Claims
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1. A decoder that is operable to perform hybrid decoding of an LDPC (Low Density Parity Check) coded modulation signal, the decoder comprising:
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a symbol sequence estimate and symbol node update functional block that receives a plurality of symbol metrics corresponding to a symbol of a plurality of symbols of the LDPC coded modulation signal and also receives a plurality of initialized LLR (log likelihood ratio) bit edge messages;
wherein;the plurality of bit edge messages corresponds to a plurality of edges that communicatively couple a plurality of symbol nodes to a plurality of check nodes within an LDPC coded modulation bipartite graph that corresponds to an LDPC code; the symbol sequence estimate and symbol node update functional block computes a first plurality of possible soft symbol estimates for the symbol; the symbol sequence estimate and symbol node update functional block updates the plurality of bit edge messages using the plurality of symbol metrics and the plurality of initialized LLR bit edge messages thereby generating a first updated plurality of bit edge messages; a check node update functional block that updates a plurality of check edge messages using the first updated plurality of bit edge messages thereby generating a first updated plurality of check edge messages;
wherein;the symbol sequence estimate and symbol node update functional block computes a second plurality of possible soft symbol estimates for the symbol using the first updated plurality of check edge messages; the symbol sequence estimate and symbol node update functional block updates the first updated plurality of bit edge messages using the received plurality of symbol metrics and the first updated plurality of check edge messages thereby generating a second updated plurality of bit edge messages; during a last iterative decoding iteration, the symbol sequence estimate and symbol node update functional block makes a best estimate for the symbol of the plurality of symbols of the LDPC coded modulation signal using that symbol'"'"'s most recent corresponding plurality of possible soft symbol estimates; and a hard limiter makes bit estimates based on the best estimate for the symbol such that the bit estimates are hard decisions for each of the individual bits of the symbol. - View Dependent Claims (2, 3, 4, 5, 6, 7, 8, 9, 10, 11)
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12. A decoder that is operable to perform hybrid decoding of an LDPC (Low Density Parity Check) coded modulation signal, the decoder comprising:
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a symbol sequence estimate and symbol node update functional block; and a check node update functional block that is communicatively coupled to the symbol sequence estimate and symbol node update functional block; and
wherein;the symbol sequence estimate and symbol node update functional block and the check node update functional block cooperatively perform iterative decoding processing of a symbol of a plurality of symbols of the LDPC coded modulation signal by successively and alternatively updating a plurality of bit edge messages and a plurality of check edge messages; the plurality of bit edge messages and the plurality of check edge messages, respectively, correspond to a plurality of edges that communicatively couple a plurality of symbol nodes to a plurality of check nodes within an LDPC coded modulation bipartite graph that corresponds to an LDPC code; the symbol sequence estimate and symbol node update functional block performs updating of the plurality of bit edge messages using a plurality of symbol metrics and a plurality of check edge messages most recently updated by the check node update functional block; the plurality of symbol metrics corresponds to the symbol of the plurality of symbols of the LDPC coded modulation signal; and the check node update functional block performs updating of the plurality of check edge messages using a plurality of bit edge messages most recently updated by the symbol sequence estimate and symbol node update functional block. - View Dependent Claims (13, 14, 15, 16, 17, 18, 19, 20, 21, 22, 23)
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24. A decoding method that performs hybrid decoding of an LDPC (Low Density Parity Check) coded modulation signal, the method comprising:
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receiving I, Q (In-phase, Quadrature) values corresponding to a symbol of a plurality of symbols of the LDPC coded modulation signal; computing a plurality of symbol metrics corresponding to the symbol; initializing a plurality of initialized LLR (log likelihood ratio) bit edge messages during an initial decoding iteration; performing iterative decoding processing that includes performing symbol node updating and performing check node updating to update a plurality of bit edge messages and a plurality of check edge messages, respectively; wherein the symbol node updating includes; computing a plurality of possible soft symbol estimates for the symbol during each decoding iteration; updating the plurality of bit edge messages using the plurality of symbol metrics corresponding to the symbol and a plurality of check edge messages most recently updated during check node updating; wherein the check node updating includes; updating the plurality of check edge messages using a plurality of bit edge messages most recently updated during symbol node updating; during a last iterative decoding iteration, making a best estimate for the symbol using that symbol'"'"'s most recent corresponding plurality of possible soft symbol estimates; and making bit estimates based on the best estimate for the symbol such that the bit estimates are hard decisions for each of the individual bits of the symbol. - View Dependent Claims (25, 26, 27, 28, 29, 30, 31, 32, 33, 34)
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Specification