Multi-terminal device having logic functional

• US 7,186,998 B2
• Filed: 01/20/2004
• Issued: 03/06/2007
• Est. Priority Date: 03/10/2003
• Status: Expired due to Term

• Current Assignee: Ovonyx Memory Technology, LLC (Micron Technology, Inc.)
• Original Assignee: Energy Conversion Devices
• Inventors: Ovshinsky, Stanford R., Pashmakov, Boil
• Primary Examiner(s): Jackson, Jerome
• Assistant Examiner(s): Fenty, Jesse A.
• Application Number:
  US10/761,022
• Publication Number:
  US 20040178402A1
• Time in Patent Office: 1,141 Days
• Field of Search: 257 2- 5
• US Class Current: 257/3
• CPC Class Codes: G11C 13/0004 comprising amorphous/crystalline phase transition cells
• CPC Class Codes: G11C 2213/53 Structure wherein the resistive material being in a transistor, e.g. gate
• CPC Class Codes: H10N 70/231 based on solid-state phase change, e.g. between amorphous and crystalline phases, Ovshinsky effect
• CPC Class Codes: H10N 70/253 having three or more electrodes, e.g. transistor-like devices
• CPC Class Codes: H10N 70/826 adapted for essentially vertical current flow, e.g. sandwich or pillar type devices
• CPC Class Codes: H10N 70/8828 Tellurides, e.g. GeSbTe

Abstract

A multi-terminal logic device. The device includes a phase change material having crystalline and amorphous states in electrical communication with three or more electrical terminals. The phase change material is able to undergo reversible transformations between amorphous and crystalline states in response to applied electrical energy where the amorphous and crystalline states show measurably distinct electrical resistances. Electrical energy in the form of current or voltage pulses applied between a pair of terminals influences the structural state and measured electrical resistance between the terminals. In the instant devices, independent input signals are provided between different pairs of terminals and the output is measured as the resistance between yet another pair of terminals. Logic functionality is achieved through relationships between the applied input signals and the measured output resistance where the relationship is governed by the effect of the input signals on the structural state and electrical resistance of the phase change material. Logic values may be associated with the crystalline and amorphous states of the phase change material or the measured resistance between a pair of terminals.

Claims

1. A method of operating an electronic device, said device comprising a phase change material, a first terminal in electrical communication with said phase change material, a second terminal in electrical communication with said phase change material and a third terminal in electrical communication with said phase change material, said method comprising the steps of:

applying a first signal between said first terminal and said second terminal;

applying a second signal between said first terminal and said third terminal; and

measuring the resistance between said second terminal and said third terminal.

2. The method of claim 1, wherein one of said first and second signals is an amorphizing signal.

3. The method of claim 2, wherein said amorphizing signal forms a resistively shielding amorphous region.

4. The method of claim 1, wherein one of said first and second signals is a crystallizing signal.

5. The method of claim 4, wherein said crystallizing signal removes a resistively shielding amorphous region.

6. The method of claim 1, wherein said first and second signals are electrical signals.

7. The method of claim 6 wherein said electrical signals an current pulses.

8. The method of claim 1, wherein said first signal modifies the resistance measured between said first and second terminals.

9. The method of claim 8, wherein said first signal does not substantially change the resistance measured between said first and third terminals.

10. The method of claim 8, wherein said second signal modifies the resistance measured between said first and third terminals.

11. The method of claim 1, further comprising the step of measuring the current between said second and third terminals.