Capturing test/emulation and enabling real-time debugging using an FPGA for in-circuit emulation

• US 7,188,063 B1
• Filed: 10/10/2001
• Issued: 03/06/2007
• Est. Priority Date: 10/26/2000
• Status: Active Grant

• Current Assignee: Monterey Research, LLC (Vector Capital Corporation)
• Original Assignee: Cypress Semiconductor Corporation (Infineon Technologies AG)
• Inventors: Snyder, Warren
• Primary Examiner(s): PHAN, THAI Q
• Application Number:
  US09/975,104
• Time in Patent Office: 1,973 Days
• Field of Search: 703 23- 28, 714/25, 714/26, 714/39, 717/128
• US Class Current: 703/26
• CPC Class Codes: G06F 11/3656 using a specific debug interface
• CPC Class Codes: G06F 30/331 with hardware acceleration, e.g. by using field programmable gate array [FPGA] or emulation

Abstract

A method for obtaining real-time debug information, e.g., state information and trace information, from an FPGA acting as a virtual microcontroller that is attached to a microcontroller under test. The two devices, the microcontroller and the FPGA execute the same instructions in lock-step with the FPGA acting as an emulator. The FPGA emulates the actual microcontroller and relieves the actual microcontroller from having debug logic installed thereon. FPGA and microcontroller, are coupled using a four pin interface. The FPGA is directly coupled to the PC for both programming and control. The system is implemented such that the microcontroller forwards information regarding I/O reads, interrupt vector information and watchdog information to the FPGA in time before the execution of the next instruction. Thus, the FPGA has an exact copy of the state information of the microcontroller.

Claims

1. A method of obtaining debug information, comprising:

executing a sequence of instructions by a device under test (DUT), wherein said DUT comprises a data line and a clock line;

executing the sequence of instructions by an emulator device emulating the functions of the DUT and executing the sequence of instructions in lock-step fashion with the DUT, wherein said emulator device shares a clock signal with said DUT;

the DUT conveying I/O read information to the emulator device over said data line during a data transfer phase; and

a host computer system reading real-time state and debug information from the emulator device without interrupting the DUT.

2. The method according to claim 1, wherein the DUT and the emulator device operate in a cycle comprising the data transfer phase and a control phase.

3. The method according to claim 1, wherein the I/O read information is conveyed to the emulator device after a start of instruction transition occurs and prior to execution of an instruction.

4. The method according to claim 3, wherein said DUT comprises a second data line, and wherein the I/O read information comprises eight bits of information, and further wherein the I/O read information is conveyed to the emulator device over said two data lines carrying four serial bits each over a time period defined by four system clock cycles.

5. The method according to claim 1, further comprising conveying interrupt vectors from the DUT to the emulator device during an interrupt service cycle.

6. The method according to claim 5, wherein the interrupt service cycle begins after assertion of an interrupt data line.

7. The method according to claim 1, wherein the DUT is selected from one of a microcontroller, a microprocessor, a microcomputer and an electronic circuit device incorporating an internal processor.

8. A method of obtaining debug information, comprising:

a) executing a sequence of instructions by a microcontroller device, wherein said microcontroller device comprises a data line and a clock line;

b) in synchronization with a), an emulator device emulating the functions of the microcontroller and executing the sequence of instructions in lock-step fashion with the microcontroller, wherein said emulator device shares a clock signal with said microcontroller device;

c) the microcontroller conveying I/O read information to the emulator device;

d) a host computer system reading real-time state and debug information from the emulator without interrupting the microcontroller; and

e) conveying interrupt vectors from the microcontroller to the emulator device during an interrupt service cycle.

9. The method according to claim 8, wherein the microcontroller and the emulator device operate in a cycle comprising a data transfer phase and a control phase.

10. The method according to claim 9, wherein the I/O read information is conveyed to the emulator device during the data transfer phase.

11. The method according to claim 10, wherein the I/O read information is conveyed to the emulator device after a start of instruction transition occurs and prior to execution of an instruction.

12. The method according to claim 11, wherein said microcontroller comprises a second data line, and wherein the I/O read information comprises eight bits of information, and wherein the I/O read information is conveyed to the emulator device over said two data lines carrying four serial bits each over a time period defined by four system clock cycles.

13. The method according to claim 8, wherein the interrupt service cycle begins after assertion of an interrupt data line.

14. A method of obtaining debug information, comprising:

executing a sequence of instructions by a device under test (DUT), wherein said DUT comprises two data lines and a clock line;

executing the sequence of instructions by an emulator device emulating the functions of the DUT and executing the sequence of instructions in lock-step fashion with the DUT, wherein said emulator device shares a clock signal with said DUT;

the DUT conveying I/O read information to the emulator device;

a host computer system reading real-time state and debug information from the emulator device without interrupting the DUT;

the DUT and the emulator device operating in a cycle comprising a data transfer phase and a control phase, wherein I/O read information is conveyed to the emulator device during the data transfer phase after a start of instruction transition occurs and prior to execution of an instruction;

wherein the I/O read information comprises eight bits of information, and wherein the I/O read information is conveyed to the emulator device over said two data lines carrying four serial bits each over a time period defined by four system clock cycles; and

conveying interrupt vectors from the DUT to the emulator device during an interrupt service cycle, with the interrupt service cycle begins after assertion of an interrupt data line.

15. The method according to claim 14, wherein the DUT is selected from one of a microcontroller, a microprocessor, a microcomputer and an electronic circuit device incorporating an internal processor.