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Selecting die placement on a semiconductor wafer to reduce test time

  • US 7,190,183 B1
  • Filed: 03/12/2004
  • Issued: 03/13/2007
  • Est. Priority Date: 03/12/2003
  • Status: Active Grant
First Claim
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1. A method of selecting a die placement of dies on a wafer to reduce test time of the dies, the method comprising:

  • a) obtaining a die placement of dies on the wafer, wherein the die placement defines the locations on the wafer on which the dies are to be fabricated;

    b) determining placements of a tester head needed to test the dies in the die placement;

    c) determining a number of touchdowns needed in the determined placements of the tester head, wherein a touchdown involves lowering the tester head to form an electrical contact between pins on the tester head and bonding pads on a die being tested; and

    d) adjusting the die placement to reduce the number of touchdowns.

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