Method and apparatus for reducing DC offsets in communication systems using universal frequency translation technology

• US 7,190,941 B2
• Filed: 12/12/2002
• Issued: 03/13/2007
• Est. Priority Date: 04/16/1999
• Status: Expired due to Fees

• Current Assignee: ParkerVision, Inc.
• Original Assignee: ParkerVision, Inc.
• Inventors: Rawlins, Michael W, Rawlins, Gregory S, Sorrells, David F, Moses, Charley D Jr., Looke, Richard C, Bultman, Michael J, Cook, Robert W
• Primary Examiner(s): Nguyen; Lee
• Application Number:
  US10/317,165
• Publication Number:
  US 20030181189A1
• Time in Patent Office: 1,552 Days
• Field of Search: 455/293, 455/296, 455302-306, 455310-311, 455/313, 455/317, 455/323, 455/324, 455/326, 327/113, 327/116, 327/356, 327/357, 375/346, 375/349, 375/351
• US Class Current: 455/296
• CPC Class Codes: H03C 3/40 using two signal paths the outputs of which have a predetermined phase difference and at least one output being amplitude-modulated
• CPC Class Codes: H03D 3/006 by sampling the oscillations and further processing the samples, e.g. by computing techniques H03D3/007 takes precedence
• CPC Class Codes: H03D 7/00 Transference of modulation from one carrier to another, e.g. frequency-changing H03D9/00, H03D11/00 take precedence; dielectric amplifiers, magnetic amplifiers, parametric amplifiers used as a frequency-changers H03F
• CPC Class Codes: H04B 1/12 Neutralising, balancing, or compensation arrangements
• CPC Class Codes: H04B 1/123 using adaptive balancing or compensation means adaptive filter circuits and algorithms H03H
• CPC Class Codes: H04B 1/28 the receiver comprising at least one semiconductor device having three or more electrodes
• CPC Class Codes: H04B 1/30 for homodyne or synchrodyne receivers demodulator circuits H03D1/22

Abstract

Methods, systems, and apparatuses for down-converting an electromagnetic (EM) signal by aliasing the EM signal, and applications thereof are described herein. Reducing or eliminating DC offset voltages and re-radiation generated when down-converting an electromagnetic (EM) signal is also described herein. Down-converting a signal and improving receiver dynamic range is also described herein.

Claims

1. An apparatus for down-converting an electromagnetic signal, comprising:

a switch; and

a capacitor coupled between an input signal and said switch;

wherein said switch samples the input signal according to a control signal to thereby transfer energy from the input signal, the transferred energy being integrated by the capacitor, the integrated energy forming a down-converted signal; and

wherein said capacitor reduces a DC offset voltage in said down-converted signal, wherein said DC offset voltage is produced at least by charge injection effects.

2. The apparatus of claim 1, wherein said switch is a MOSFET switch.

3. The apparatus of claim 1, wherein said switch under-samples said input signal according to said control signal.

4. The apparatus of claim 1, further comprising a control signal generator that generates said control signal.

5. An apparatus for reducing DC offset in a signal path, comprising:

a first summer that receives an input signal;

a resistor that has a first terminal and a second terminal, wherein said resistor receives said input signal at said first terminal;

a switch that has a first terminal, a second terminal, and a third terminal, wherein said first terminal of said switch is coupled to said first terminal of said resistor, and wherein said second terminal of said switch is coupled to said second terminal of said resistor;

a capacitor that has a first terminal and a second terminal, wherein said first terminal of said capacitor is coupled to said second terminal of said resistor, and wherein said second terminal of said capacitor is coupled to a first voltage reference; and

a second summer that has a first terminal and a second terminal, wherein said first terminal of said second summer is coupled to said second terminal of said resistor, and wherein said second terminal of said summer is coupled to a second voltage reference.

6. The apparatus of claim 5, wherein said third terminal of said switch receives a receive mode signal, wherein said receive mode signal causes said switch to couple said first terminal of said capacitor to said input signal.

7. The apparatus of claim 5, wherein said second summer outputs an adjustment signal, wherein said first summer receives said adjustment signal, and outputs an adjusted output signal.

8. A method of reducing DC offset in a signal path, comprising the steps of:

(1) storing an input signal DC offset voltage while in a signal non-receive mode;

(2) changing to a signal receive mode;

(3) relatively slowly following the input signal to maintain the DC offset voltage and any DC offset voltage drift;

(4) summing the maintained DC offset voltage with a centering voltage to form an adjusted DC offset voltage signal; and

(5) subtracting the adjusted DC offset voltage signal from the input signal to form a DC offset adjusted output signal.

9. An apparatus for down-converting an electromagnetic signal, comprising:

a first frequency down-conversion module comprising a first terminal that receives an input signal;

a second frequency down-conversion module;

a control signal generator that outputs a control signal, wherein said control signal is received by said first frequency down-conversion module and said second frequency down-conversion module;

an impedance with a first terminal and a second terminal, wherein said first terminal of said impedance is coupled to an input of said second frequency down-conversion module;

a voltage reference coupled to said second terminal of said impedance; and

a summer that subtracts an output of said second frequency down-conversion module from an output of said first frequency down-conversion module, and outputs a down-converted signal;

whereby DC offsets voltages due to said first frequency down-conversion module and said second frequency down-conversion module are substantially canceled from said down-converted signal by said summer.

10. The apparatus of claim 9, wherein said impedance is chosen to approximate an input impedance present at said first terminal of said first frequency down-conversion module.

11. The apparatus of claim 9, wherein said first frequency down-conversion module under-samples said input signal according to said control signal, and wherein said second frequency down-conversion module under-samples said input signal according to said control signal.

12. The apparatus of claim 9, wherein said first and said second frequency down-conversion modules each comprise a switch and a storage element, wherein a first node of said switch is coupled to a node of said storage element, and a second node of said switch is coupled to a reference potential.

13. The apparatus of claim 9, wherein said first and second frequency down-conversion modules each comprise a switch and a storage element, wherein a first node of said storage element is coupled to a node of said switch, and a second node of said storage element is coupled to a reference potential.

14. A method of down-converting an electromagnetic signal, comprising the steps of:

(1) receiving a first input signal;

(2) frequency down-converting the first input signal to a first down-converted signal;

(3) generating an unmodulated dummy input signal;

(4) frequency down-converting the unmodulated dummy input signal to a dummy down-converted signal; and

(5) subtracting the dummy down-converted signal from the first down-converted signal to form an output signal.

15. The method of claim 14, wherein step (3) comprises the step of:

matching an impedance relating to the down-conversion of step (4) with an input impedance relating to the down-conversion of step (2).

16. The method of claim 14, wherein the unmodulated dummy input signal is a ground signal.

17. The method of claim 14, wherein the unmodulated dummy input signal is a voltage reference signal.

18. The method of claim 14, wherein step (5) comprises canceling DC offset voltages introduced during steps (2) and (4).

19. An apparatus for substantially canceling DC offsets in a receiver, comprising:

a differential amplifier that receives an input signal, wherein said differential amplifier outputs a non-inverted output signal and an inverted output signal;

a first frequency down-conversion module that receives said non-inverted output signal;

a second frequency down-conversion module that receives said inverted output signal;

a control signal generator that outputs a control signal, wherein said control signal is received by said first frequency down-conversion module and said second frequency down-conversion module, wherein said first frequency down-conversion module outputs a down-converted non-inverted output signal and said second frequency down-conversion module outputs a down-converted inverted output signal; and

a summer that subtracts said down-converted inverted output signal from said down-converted non-inverted output signal, and outputs a down-converted signal;

whereby DC offsets voltages due to said first frequency down-conversion module in said down-converted non-inverted output signal and due to said second frequency down-conversion module in said down-converted inverted output signal are substantially canceled from said down-converted signal by said summer.

20. The apparatus of claim 19, wherein said first frequency down-conversion module and said second frequency down-conversion module are confignred similarly in order to generate substantially equal DC offset voltages.

21. The apparatus of claim 19, wherein said first frequency down-conversion module under-samples said non-inverted input signal according to said control signal, and said second frequency down-conversion module under-samples said inverted input signal according to said control signal.

22. The apparatus of claim 19, wherein said first and said second frequency down-conversion modules each comprise a switch and a storage element, wherein a first node of said switch is coupled to a node of said storage element, and a second node of said switch is coupled to a reference potential.

23. The apparatus of claim 19, wherein said first and second frequency down-conversion modules each comprise a switch and a storage element, wherein a first node of said storage element is coupled to a node of said switch, and a second node of said storage element is coupled to a reference potential.

24. A method of down-converting an electromagnetic signal and substantially canceling DC offset voltages in a receiver, comprising the steps of:

(1) receiving an input signal;

(2) amplifying the received input signal and generating a non-inverted output signal and an inverted output signal;

(3) frequency down-converting the non-inverted output signal to a non-inverted down-converted signal;

(4) frequency down-converting the inverted output signal to an inverted down-converted signal; and

(5) subtracting the inverted down-converted signal from the non-inverted down-converted signal to form an output signal.

25. The method of claim 24, wherein step (5) comprises the step of:

canceling DC offset voltages in the non-inverted down-converted signal and the inverted down-converted signal produced by operation of steps (3) and (4).

26. The method of claim 24, further comprising the step of:

(6) performing steps (3) and (4) to generate substantially equal DC offset voltages for the input signal.

27. A method of down-converting an electromagnetic signal, comprising the steps of:

(1) receiving a first input signal;

(2) frequency down-converting the first input signal to a first down-converted signal;

(3) receiving a second input signal that is different from the first input signal;

(4) frequency down-converting the second input signal to a second down-converted signal; and

(5) subtracting the second down-converted signal from the first down-converted signal to form an output signal;

wherein step (5) comprises canceling DC offset voltages introduced during steps (2) and (4); and

wherein the second input signal is a ground signal.

28. A method of down-converting an electromagnetic signal, comprising the steps of:

(1) receiving a first input signal;

(2) frequency down-converting the first input signal to a first down-converted signal;

(3) receiving a second input signal that is different from the first input signal;

(4) frequency down-converting the second input signal to a second down-converted signal; and

(5) subtracting the second down-converted signal from the first down-converted signal to form an output signal;

wherein step (5) comprises canceling DC offset voltages introduced during steps (2) and (4); and

wherein the second input signal is a voltage reference signal.