Shared antenna control

• US 7,190,974 B2
• Filed: 03/26/2004
• Issued: 03/13/2007
• Est. Priority Date: 03/26/2004
• Status: Expired due to Fees

• Current Assignee: Avago Technologies General IP PTE Limited (Broadcom, Inc.)
• Original Assignee: Broadcom Corporation (Broadcom, Inc.)
• Inventors: Fifield, David, Efland, Greg
• Primary Examiner(s): Feild; Joseph
• Assistant Examiner(s): SMITH, SHEILA B
• Application Number:
  US10/811,016
• Publication Number:
  US 20050215287A1
• Time in Patent Office: 1,082 Days
• Field of Search: 455/562.1, 455/63.1, 455/279.1, 343/776, 343/853, 343/893, 343/751
• US Class Current: 455/562.1
• CPC Class Codes: H04B 1/406 with more than one transmission mode, e.g. analog and digital modes
• CPC Class Codes: H04M 2250/06 including a wireless LAN interface

Abstract

A scheme for sharing antenna control pins in a wireless communications device implemented on a single CMOS integrated circuit is described. By providing a routing circuit for coupling the antenna control signal to the appropriate transceiver circuitry in a multi-transceiver system, antenna control signals may be efficiently processed using a minimum of pins on the wireless communication device.

Claims

1. In an integrated circuit wireless communication device, a method for controlling wireless communications with at least two wireless transceiver circuits, comprising:

generating a first antenna control signal at a first pin set of said wireless communication device, said first antenna control signal to be used for controlling receiving or transmitting operations over a first plurality of antennas coupled to a first wireless transceiver circuit for a first communication packet;

routing said first antenna control signal to the first wireless transceiver circuit upon detecting that the first communication packet is to be received or transmitted using the first wireless transceiver circuit;

generating a second antenna control signal at the first pin set of said wireless communication device, said second antenna control signal to be used for controlling receiving or transmitting operations over a second plurality of antennas coupled to a second wireless transceiver circuit for a second communication packet; and

routing said second antenna control signal to the second wireless transceiver circuit upon detecting that the second communication packet is to be received or transmitted using the second wireless transceiver circuit.

2. The method of claim 1, wherein the first wireless transceiver circuit comprises an 802.11g radio transceiver circuit and the second wireless transceiver circuit comprises an 802.11a radio transceiver circuit.

3. The method of claim 1, wherein a multiplexer circuit is used for generating the first and second antenna control signals.

4. The method of claim 1, wherein the first antenna control signal specifies that one of the first plurality of antennas is to be used for receiving a wireless communication signal.

5. The method of claim 1, wherein the first plurality of antennas are coupled to the first wireless transceiver circuit through a diversity switch, and wherein the first antenna control signal controls the diversity switch to connect one of the plurality of antennas to the wireless communication device.

6. The method of claim 1, wherein a PHY module in the wireless communication device generates the first and second antenna control signals that are selectively coupled on a common signal line to the first or second transceiver circuits by a first selection circuit.

7. The method of claim 6, wherein the PHY module and the first wireless transceiver circuit are integrated on a single integrated circuit.

8. The method of claim 1, wherein the second wireless transceiver circuit is integrated on a single integrated circuit.

9. The method of claim 1, wherein the second antenna control signal specifies that one of the second plurality of antennas is to be used for transmitting a wireless communication signal.

10. The method of claim 1, wherein the second antenna control signal specifies that one of the second plurality of antennas is to be used for receiving a wireless communication signal.

11. An apparatus, comprising:

an integrated circuit processing module for processing receive or transmit baseband signals in accordance with first and second wireless communication protocols, said processing module generating first and second antenna switch control signals, said processing module comprising a selection circuit for routing one of said first and second antenna switch control signals to a single output port on the integrated circuit processing module;

a first radio transceiver coupled to the processing module for converting baseband and RF signals in accordance with the first wireless communication protocol;

a first antenna module coupled to the first radio transceiver for receiving and transmitting RF signals in accordance with the first wireless communication protocol;

a second radio transceiver coupled to the processing module for converting baseband and RF signals in accordance with the second wireless communication protocol;

a second antenna module coupled to the second radio transceiver for receiving and transmitting RF signals in accordance with the second wireless communication protocol;

where the first and second antenna modules are each coupled in parallel to the single output port on the integrated circuit processing module to receive a shared antenna switch control signal.

12. The apparatus of claim 11, wherein the first wireless communication protocol is IEEE 802.11g and the second wireless communication protocol is IEEE 802.11a.

13. The apparatus of claim 11, wherein the integrated circuit processing module comprises a MAC layer module and a IEEE 802.11a/g PHY module.

14. The apparatus of claim 11, wherein the first antenna module comprises first and second antennas and a diversity switch that couples one of the first and second antennas to the first radio transceiver in response to an antenna switch control signal provided by the single output port.

15. The apparatus of claim 11, wherein the selection circuit comprises a multiplexer circuit that selects between first and second antenna switch control signals to output a shared antenna switch control signal in response to a selection signal.

16. The apparatus of claim 11, wherein the single output port comprises a single set of conductor wires coupled in parallel to the first and second antenna modules.

17. The apparatus of claim 11, wherein the first and second antenna modules each use different antenna switching configurations.

18. The apparatus of claim 11, wherein the first antenna module comprises a transmit/receive switch module for coupling a first antenna to a receive or transmit signal path in response to the shared antenna switch control signal;

shared antenna each use different antenna switching configurations;

second single output port comprises a single set of conductor wires coupled in parallel to the first and second antenna modules.

19. An apparatus for providing dual band wireless communications, comprising:

a baseband processing module for processing receive or transmit baseband signals in accordance with 802.11a and 802.11g wireless communication protocols, said baseband processing module generating first and second antenna switch control signals, said baseband processing module comprising a multiplexing circuit for routing one of said first and second antenna switch control signals to a single set of output pins for the baseband processing module;

a first front end modulator comprising one or more antennas for sending or receiving a first wireless signal in accordance with the 802.11g wireless communication protocol under control of the first antenna switch control signal;

a second front end modulator comprising one or more antennas for sending or receiving a second wireless signal in accordance with the 802.11a wireless communication protocol under control of the second antenna switch control signal;

where each of said first and second front end modulators are coupled in parallel to the single set of output pins.

20. The apparatus of claim 19, wherein the baseband processing module, first front end modulator and second front end modulator are each implemented as separate integrated circuits.