Floating gate transistors

• US 7,193,264 B2
• Filed: 10/28/2003
• Issued: 03/20/2007
• Est. Priority Date: 10/30/2002
• Status: Expired due to Fees

• Current Assignee: Toumaz Technology Ltd.
• Original Assignee: Toumaz Technology Ltd.
• Inventors: Lande, Tor Sverre
• Primary Examiner(s): Le; Thao X.
• Assistant Examiner(s): Hafiz; Mursalin B.
• Application Number:
  US10/532,679
• Publication Number:
  US 20060086969A1
• Time in Patent Office: 1,239 Days
• Field of Search: 365/185.03, 365/185.05, 257/314, 257/316, 257/317, 257/319
• US Class Current: 257/314
• CPC Class Codes: G06G 7/60 for living beings, e.g. their nervous systems ; for problems in the medical field
• CPC Class Codes: G11C 27/005 with non-volatile charge storage, e.g. on floating gate or MNOS
• CPC Class Codes: H01L 29/40114 the electrodes comprising a conductor-insulator-conductor-insulator-semiconductor structure
• CPC Class Codes: H01L 29/42324 Gate electrodes for transistors with a floating gate
• CPC Class Codes: H01L 29/66825 with a floating gate H01L29/6684 takes precedence
• CPC Class Codes: H01L 29/788 with floating gate H01L29/78391 takes precedence
• CPC Class Codes: H10B 69/00 Erasable-and-programmable ROM [EPROM] devices not provided for in groups H10B41/00 - H10B63/00, e.g. ultraviolet erasable-and-programmable ROM [UVEPROM] devices

Abstract

A floating gate MOS transistor comprises one or more control gates, an active channel, and at least one floating gate disposed between the control gate(s) and the active channel. First and second non-linear resistances couple the floating gate to first and second control voltage sources respectively, the non-linear resistances forming a voltage divider network which sets the operating voltage of the floating gate.

Claims

1. A floating gate MOS transistor comprising:

one or more control gates;

an active channel;

at least one floating gate disposed substantially between the active channel and the one or more control gates;

first and second non-linear resistances coupling the floating gate to first and second control voltage sources respectively, the resistances forming a voltage divider network which sets the operating voltage of the floating gate.

2. A transistor according to claim 1, wherein said non-linear resistances are provided by respective diodes, with the voltages applied to the first and second voltage sources being defined so that in use the diodes are reverse biased.

3. An electronic device comprising one or more floating gate transistors according to claim 1.

4. An electronic device according to claim 3, wherein the electronic device comprises means for varying the voltage applied to one or both of the first and second control voltage sources so that the operating voltage of the floating gate can be tuned to an appropriate value.

5. A method of operating the floating gate transistor of claim 1, the method comprising applying first and second fixed voltages to the first and second voltage sources respectively so as to set the floating gate to a desired operating voltage by an appropriate selection of the first and second voltages.

6. A method of operating the floating gate transistor of claim 1, the method comprising applying first and second voltages to the first and second voltage sources respectively, at least one of the first and second voltages being variable so that the voltage at which the floating gate is operated can be set to a desired value by tuning one or both of the first and second voltages.

9. An electronic device comprising one or more floating gate transistors according to claim 2.

10. A method of operating the floating gate transistor of claim 2, the method comprising applying first and second fixed voltages to the first and second voltage sources respectively so as to set the floating gate to a desired operating voltage by an appropriate selection of the first and second voltages.

11. A method of operating the floating gate transistor of claim 2, the method comprising applying first and second voltages to the first and second voltage sources respectively, at least one of the first and second voltages being variable so that the voltage at which the floating gate is operated can be set to a desired value by tuning one or both of the first and second voltages.

12. A transistor according to claim 1, wherein said non-linear resistances comprise respective transistors operating as diodes, with the voltages applied to the first and second voltage sources being defined so that in use the diodes are reverse biased.

13. An electronic device comprising one or more floating gate transistors according to claim 12.

14. A method of operating the floating gate transistor of claim 12, the method comprising applying first and second fixed voltages to the first and second voltage sources respectively so as to set the floating gate to a desired operating voltage by an appropriate selection of the first and second voltages.

15. A method of operating the floating gate transistor of claim 12, the method comprising applying first and second voltages to the first and second voltage sources respectively, at least one of the first and second voltages being variable so that the voltage at which the floating gate is operated can be set to a desired value by tuning one or both of the first and second voltages.

7. A floating gate MOS transistor comprising:

one or more control gates;

an active channel;

at least one floating gate disposed substantially between the active channel and the one or more control gates;

at least one non-linear resistance coupling the floating gate to a voltage source, the non-linear resistance being provided by a MOS transistor having its gate and source connected together, the transistor source being coupled to said voltage source and the transistor drain being coupled to the floating gate.

8. A transistor according to claim 7, the transistor gate being coupled to the transistor source via a resistance.