Configurable circuits, IC's, and systems

• US 7,193,440 B1
• Filed: 06/30/2004
• Issued: 03/20/2007
• Est. Priority Date: 02/14/2004
• Status: Expired due to Fees

• Current Assignee: Tahoe Research Limited (f/k/a Learndale Limited) (Vector Capital Corporation)
• Original Assignee: Tabula Incorporated
• Inventors: Schmit, Herman, Butts, Michael, Hutchings, Brad L., Teig, Steven
• Primary Examiner(s): Barnie, Rexford
• Assistant Examiner(s): WHITE, DYLAN C
• Application Number:
  US10/882,946
• Time in Patent Office: 993 Days
• Field of Search: 326 37- 41, 326/47, 716/16
• US Class Current: 326/47
• CPC Class Codes: H03K 19/1737 using multiplexers H03K19/1738 takes precedence
• CPC Class Codes: H03K 19/17736 Structural details of routing resources
• CPC Class Codes: H03K 19/17752 for hot reconfiguration
• CPC Class Codes: H03K 19/17756 for partial configuration or partial reconfiguration

Abstract

Some embodiments of the invention provide a configurable integrated circuit (IC). The configurable IC includes first and second interconnect circuits. The first interconnect circuit has a set of input terminals, a set of output terminals, and several connection schemes for communicatively coupling the input terminal set to the output terminal set. During the operation of the IC, the second connection circuit supplies sets of configuration data to the first interconnect circuit at a particular rate for at least a particular time period. At least two supplied configuration data sets are different and configure the first interconnect circuit to use two different connection schemes that differently couple the input and output terminal sets.

Claims

1. An integrated circuit (IC) comprising:

1) a set of configurable logic circuits, each configurable logic circuit for configurably performing a set of functions;

2) a set of configurable interconnect circuits for configurably coupling the logic circuits;

wherein each of a plurality of configurable interconnect circuits comprises;

a) a first interconnect circuit having a set of input terminals, a set of output terminals, a set of configuration data lines, and a plurality of connection schemes for communicatively coupling the input terminal set to the output terminal set; and

b) a second connection circuit for supplying sets of configuration data to said configuration data lines of the first interconnect circuit, wherein during an operation of the IC, the second connection circuit receives a control signal that directs the second connection circuit to supply configuration data sets to the first interconnect circuit at a particular rate for at least a particular time period, wherein the control signal has a rate that is at least equal to the particular rate, wherein at least two supplied configuration data sets are different and configure the first interconnect circuit to use two different connection schemes that differently couple the input and output terminal sets, wherein said supplied configuration data sets are simultaneously stored in the IC.

2. The IC of claim 1, wherein the set of configurable interconnect circuits includes at least one hundred configurable interconnect circuits.

3. The IC of claim 1, wherein the first interconnect circuit is a multiplexer.

5. The IC of claim 1 further comprising a storage for storing configuration data, wherein the second connection circuit communicatively couples to the first interconnect circuit and to the storage to supply sets of configuration data stored in the storage to the first interconnect circuit.

6. The IC of claim 5, wherein the storage comprises memory cells.

7. The IC of claim 6, wherein the memory cells are read-writeable memory cells.

8. The IC of claim 1, wherein the control signal is a clock signal.

9. The IC of claim 8, wherein the control signal has a value that changes at the rate of the control signal.

10. The IC of claim 1, wherein the second circuit includes a plurality of sub-circuits, wherein each sub-circuit stores configuration data, and configuration data from the sub-circuits is supplied to the first interconnect circuit at the particular rate.

4. An integrated circuit (IC) comprising:

1) a set of configurable logic circuits, each configurable logic circuit for configurably performing a set of functions;

2) a set of configurable interconnect circuits for configurably coupling the logic circuits;

wherein each of a plurality of configurable interconnect circuits comprises;

a) a first interconnect circuit having a set of input terminals, a set of output terminals, a set of configuration data lines, and a plurality of connection schemes for communicatively coupling the input terminal set to the output terminal set, wherein the first interconnect circuit is a decoder; and

b) a second connection circuit for supplying sets of configuration data to said configuration data lines of the first interconnect circuit at a particular rate for at least a particular time period, wherein at least two supplied configuration data sets are different and configure the first interconnect circuit to use two different connection schemes that differently couple the input and output terminal sets, wherein said supplied configuration data sets are simultaneously stored in the IC.

11. A configurable interconnect circuit for an integrated circuit (IC), the configurable interconnect circuit comprising:

a) a first interconnect circuit having a set of input terminals, a set of output terminals, a set of configuration data lines, and a plurality of connection schemes for communicatively coupling the input terminal set to the output terminal set; and

b) a second connection circuit for supplying sets of configuration data to said set of configuration data lines of the interconnect circuit, wherein said sets of configuration data are simultaneously stored in the IC;

wherein the second connection circuit comprises at least a third interconnect circuit and a fourth interconnect circuit;

wherein each of said third and fourth interconnect circuits simultaneously provides data for at least one of said configuration data lines;

wherein at least two supplied configuration data sets are different and configure the configurable interconnect circuit to use two different connection schemes that differently couple the input and output terminal sets;

wherein during an operation of the IC, the second connection circuit supplies configuration data sets to the first interconnect circuit at a particular rate for at least a duration of time;

wherein during the operation of the IC, the second connection circuit receives a control signal that directs the second connection circuit to supply configuration data sets to the first interconnect circuit at the particular rate;

wherein the control signal has a rate that is at least equal to the particular rate.

12. The configurable interconnect circuit of claim 11 further comprising a storage for storing configuration data, wherein the second connection circuit communicatively couples to the first interconnect circuit and to the storage to supply sets of configuration data stored in the storage to the first interconnect circuit.

13. The configurable interconnect circuit of claim 12, wherein the storage comprises memory cells.

14. The configurable interconnect circuit of claim 13, wherein the memory cells are read-writeable memory cells.

15. The configurable interconnect circuit of claim 11, wherein the control signal is a clock signal.

16. The configurable interconnect circuit of claim 15, wherein the control signal has a value that changes at the rate of the control signal.

17. The configurable interconnect circuit of claim 11, wherein the second circuit includes a plurality of sub-circuits, wherein each sub-circuit stores configuration data, and configuration data from the sub-circuits is supplied to the first interconnect circuit at the particular rate.

18. A system comprising

a) a memory for storing data;

and

b) configurable integrated circuit (IC) communicatively coupled to the memory to receive and process the data, the configurable IC comprising;

1) a set of configurable logic circuits for configurably performing a set of functions;

2) a set of configurable interconnect circuits for configurably coupling the logic circuits;

wherein each of a plurality of configurable interconnect circuits comprises;

i) a first interconnect circuit having a set of input terminals, a set of output terminals, a set of configuration data lines, and a plurality of connection schemes for communicatively coupling the input terminal set to the output terminal set; and

ii) a second connection circuit for supplying sets of the configuration data to said configuration data lines of the first interconnect circuit, wherein at least two different configuration data sets that configure the first interconnect circuit are different and configure the first interconnect circuit to use two different connection schemes, wherein said supplied configuration data sets are simultaneously stored in the IC;

wherein during an operation of the IC, a particular second connection circuit of a particular configurable interconnect circuit of at least a sub-set of configurable interconnect circuits supplies configuration data sets to the particular first interconnect circuit of the particular configurable interconnect circuit at a particular rate for at least a duration of time;

wherein during the operation of the IC, the particular second connection circuit receives a control signal that directs the second connection circuit to supply configuration data sets to the particular first interconnect circuit at the particular rate;

wherein the control signal has a rate that is at least equal to the particular rate.

19. The system of claim 18, wherein the set of configurable interconnect circuits includes at least one hundred configurable interconnect circuits.

20. The system of claim 18, wherein a plurality of the configurable interconnect circuits are multiplexers and a plurality of the configurable interconnect circuit are decoders.

21. The system of claim 18, wherein the control signal is a clock signal.

22. The system of claim 21, wherein the control signal has a value that changes at the rate of the control signal.

23. The system of claim 18, wherein the second circuit includes a plurality of sub-circuits, wherein each sub-circuit stores configuration data, and configuration data from the sub-circuits is supplied to the first interconnect circuit at the particular rate.