Dual loop voltage regulation circuit of power supply chip

• US 7,193,453 B2
• Filed: 08/23/2005
• Issued: 03/20/2007
• Est. Priority Date: 06/29/2005
• Status: Expired due to Fees

• Current Assignee: Leadtrend Technology Corporation
• Original Assignee: Leadtrend Technology Corporation
• Inventors: Chu, Yi-Shan, Wei, Da-Chun, Chia, Ju-Lin
• Primary Examiner(s): ZWEIZIG, JEFFERY SHAWN
• Application Number:
  US11/208,651
• Publication Number:
  US 20070001749A1
• Time in Patent Office: 574 Days
• Field of Search: 323/224, 327/110, 327/112, 327/535, 327/538, 327/540, 327/543
• US Class Current: 327/538
• CPC Class Codes: H03K 17/04206 in field-effect transistor switches
• CPC Class Codes: H03K 17/165 by feedback from the output circuit to the control circuit

Abstract

A dual loop voltage regulation circuit of power supply chip is provided, comprising a capacitor for providing a voltage signal, a comparator for comparing a first reference voltage signal and the voltage signal to output forward or backward trigger signal, a first switch triggered by a forward trigger signal, a second switch triggered by a backward trigger signal, a first operational amplifier generating a first drive signal while the first and second switches are on, a first transistor switch triggered to be on by a first drive signal to provide a current source loop, a third switch triggered by a forward trigger signal, a fourth switch triggered by a backward trigger signal, a second operational amplifier generating a second drive signal while the third and fourth switches are on, and a second transistor switch triggered to be on by a second drive signal to provide a current sink loop.

Claims

1. A dual loop voltage regulation circuit of power supply chip, comprising:

a capacitor arranged at the output end of the voltage regulation circuit to provide a voltage signal;

a comparator comparing a first reference voltage signal and the voltage signal so as to output a forward trigger signal or a backward trigger signal;

a first switch connected to the output end of the comparator, triggered by the forward trigger signal;

a second switch connected to the output end of the comparator, triggered by the backward trigger signal;

a first operational amplifier, wherein when the first switch or the second switch is on, the forward input end receives a second reference voltage signal and generates a first drive signal after the operation on the signal from the backward input end of the first operational amplifier;

a first transistor switch triggered to be on by the first drive signal so as to provide a current source loop;

a third switch connected to the output end of the comparator, triggered by the forward trigger signal;

a fourth switch connected to the output end of the comparator, triggered by the backward trigger signal;

a second operational amplifier, wherein when the third switch or the fourth switch is on, the backward input end receives the second reference voltage signal and generates a second drive signal after the operation on the signal from the forward input end of the second operational amplifier; and

a second transistor switch triggered to be on by the second drive signal so as to provide a current sink loop.

2. The dual loop voltage regulation circuit according to claim 1, wherein the first transistor switch is an N-type metal-oxide semiconductor transistor switch.

3. The dual loop voltage regulation circuit according to claim 1, wherein the first transistor switch is a P-type metal-oxide semiconductor transistor switch.

4. The dual loop voltage regulation circuit according to claim 1, wherein the second transistor switch is an N-type metal-oxide semiconductor transistor switch.

5. The dual loop voltage regulation circuit according to claim 1, wherein the second transistor switch is a P-type metal-oxide semiconductor transistor switch.

6. The dual loop voltage regulation circuit according to claim 1, wherein the first switch is a bipolar junction transistor switch.

7. The dual loop voltage regulation circuit according to claim 1, wherein the first switch is a metal-oxide semiconductor transistor switch.

8. The dual loop voltage regulation circuit according to claim 1, wherein the second switch is a bipolar junction transistor switch.

9. The dual loop voltage regulation circuit according to claim 1, wherein the second switch is a metal-oxide semiconductor transistor switch.

10. The dual loop voltage regulation circuit according to claim 1, wherein the third switch is a bipolar junction transistor switch.

11. The dual loop voltage regulation circuit according to claim 1, wherein the third switch is a metal-oxide semiconductor transistor switch.

12. The dual loop voltage regulation circuit according to claim 1, wherein the fourth switch is a bipolar junction transistor switch.

13. The dual loop voltage regulation circuit according to claim 1, wherein the fourth switch is a metal-oxide semiconductor transistor switch.

14. The dual loop voltage regulation circuit according to claim 1, wherein the output end of the first operational amplifier is connected to the gate of the first transistor switch.

15. The dual loop voltage regulation circuit according to claim 1, wherein the output end of the second operational amplifier is connected to the gate of the second transistor switch.