Cache for instruction set architecture using indexes to achieve compression
First Claim
1. A method for compressing a set of instructions for a node in a adaptive computing machine, the method comprising:
- identifying frequently executed instruction in the set of instructions for an information processing device;
inserting an explicit caching instruction in the set of instructions before the identified instruction, wherein the explicit caching instruction associates the identified instruction with at least one index value, the at least one index value referencing an area of an instruction storage unit; and
replacing at least one instance of the frequently executed instruction subsequent to the explicit caching instruction with a compressed instruction referencing the at least one index value, wherein the compressed instruction directs an information processing device to execute the identified instruction associated with the at least one index value wherein the frequently executed instruction is accessible from the instruction storage unit using the at least one index value.
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Accused Products
Abstract
A method for compressing a set of instructions in an adaptive computing machine includes identifying frequently executed instructions, inserting an explicit caching instruction associating the identified instructions with an index value in the set of instructions before the identified instructions and replacing at least one instance of the frequently executed instructions subsequent to the explicit caching instruction with a compressed instruction referencing the index value. One or more instructions can be identified for compression, including groups of consecutive or non-consecutive instructions. The explicit caching instruction directs a node in an adaptive computing machine to store instructions in an instruction storage unit in association with an index value. Instructions stored in the storage unit are retrievable with reference to the index value. The compressed instruction may include one or more references to index values, and can include a sequence of index values indicating the sequence of execution of the associated instructions.
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Citations
19 Claims
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1. A method for compressing a set of instructions for a node in a adaptive computing machine, the method comprising:
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identifying frequently executed instruction in the set of instructions for an information processing device; inserting an explicit caching instruction in the set of instructions before the identified instruction, wherein the explicit caching instruction associates the identified instruction with at least one index value, the at least one index value referencing an area of an instruction storage unit; and replacing at least one instance of the frequently executed instruction subsequent to the explicit caching instruction with a compressed instruction referencing the at least one index value, wherein the compressed instruction directs an information processing device to execute the identified instruction associated with the at least one index value wherein the frequently executed instruction is accessible from the instruction storage unit using the at least one index value. - View Dependent Claims (2, 3, 4, 5, 6, 7, 8, 9, 10, 11)
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12. A method for executing a set of instructions for an information processing device, the method comprising:
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retrieving a primary instruction within the set of instructions from a memory; when the primary instruction is an explicit caching instruction, storing at least one instruction subsequent to the primary Instruction in an instruction storage unit; and when the primary instruction is a compressed instruction, retrieving, from the instruction storage unite, the at least one previously stored instruction using the compressed instruction and executing the at least one previously stored instruction. - View Dependent Claims (13, 14, 15, 16, 17, 18)
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19. An adaptive computing machine configured to compress a set of instructions for a node, wherein the adaptive computing machine comprises one or more processors and a memory containing logic that, when processed by the one or more processors, cause the one or more processors to perform a set of steps comprising:
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identifying frequently executed instruction in the set of instructions for an information processing device; inserting an explicit caching instruction in the set of instructions before the identified instruction, wherein the explicit caching instruction associates the identified instruction with at least one index value, the at least on index value referencing an area of an instruction storage unit; and replacing at least one instance of the frequently executed instruction subsequent to the explicit caching instruction with a compressed instruction referencing the at least on index value, wherein the frequently executed instruction is accessible from the instruction storage unit using the at least one index value.
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Specification