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Bandwidth efficient coded modulation scheme based on MLC (multi-level code) signals having multiple maps

  • US 7,197,690 B2
  • Filed: 12/20/2004
  • Issued: 03/27/2007
  • Est. Priority Date: 05/31/2002
  • Status: Expired due to Term
First Claim
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1. An apparatus,a data partitioner that is operable to partition a plurality of input bits into a first plurality of input bits and a second plurality of input bits;

  • a first LDPC (Low Density Parity Check) encoder that is operable to encode the first plurality of input bits thereby generating a first level LDPC codeword;

    a second LDPC encoder that is operable to encode the second plurality of input bits thereby generating a second level LDPC codeword;

    a symbol mapper that is operable to;

    group at least a first bit of the first level LDPC codeword and at least a first bit of the second level LDPC codeword thereby forming a first sub-block symbol of a plurality of sub-block symbols;

    group at least a second bit of the first level LDPC codeword and at least a second bit of the second level LDPC codeword thereby forming a second sub-block symbol of the plurality of sub-block symbols;

    symbol map the first sub-block symbol of the plurality of sub-block symbols according to a first modulation that includes a first constellation shape and a corresponding first mapping of the plurality of mappings;

    symbol map the second sub-block symbol of the plurality of sub-block symbols according to a second modulation that includes a second constellation shape and a corresponding second mapping of the plurality of mappings; and

    output an MLC LDPC (Multi-Level Code Low Density Parity Check) coded modulation signal, being a sequence of discrete-valued modulation symbols that is mapped using a plurality of mappings, that includes the symbol mapped first sub-block symbol and the symbol mapped second sub-block symbol.

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