Cyclic digital to analog converter

• US 7,199,743 B2
• Filed: 12/29/2004
• Issued: 04/03/2007
• Est. Priority Date: 12/29/2004
• Status: Expired due to Fees

• Current Assignee: Intel Corporation
• Original Assignee: Intel Corporation
• Inventors: Casper, Bryan K., Petrie, Craig S.
• Primary Examiner(s): Mai; Lam T.
• Application Number:
  US11/025,579
• Publication Number:
  US 20060139195A1
• Time in Patent Office: 825 Days
• Field of Search: 341140-170, 341/172
• US Class Current: 341/150
• CPC Class Codes: H03M 1/667 Recirculation type

Abstract

A digital to analog converter (DAC) circuit operates least significant bit (LSB) first.

Claims

1. A digital to analog converter comprising:

an amplifier;

a first capacitor coupled to an input node of the amplifier;

a second capacitor coupled between the input node of the amplifier and an output node of the amplifier, wherein the second capacitor has a capacitance value substantially twice a capacitance value of the first capacitor; and

at least one switching element coupled to the first capacitor, wherein the switching element is coupled to be responsive to a least-significant-bit first sequence of digital bits in a digital word.

2. The digital to analog converter of claim 1 wherein the amplifier comprises an operational amplifier.

3. The digital to analog converter of claim 1 further comprising a conditional feedback path coupled between the output of the amplifier and the first capacitor.

4. The digital to analog converter of claim 3 wherein the conditional feedback path has a gain of substantially −

1.

5. The digital to analog converter of claim 1 wherein the at least one switching element is coupled to to apply a reference voltage to the first capacitor.

6. The digital to analog converter of claim 5 wherein the at least one switching element includes a first switching element coupled to conditionally apply a positive reference voltage to the first capacitor, and a second switching element coupled to conditionally apply a negative reference voltage to the first capacitor.

7. A digital to analog converter comprising:

an operational amplifier configured as an integrator with a feedback capacitor of 2C where C is a capacitance value;

an input capacitor of substantially C; and

switching circuitry to successively impose one of two reference voltages in response to a digital code word applied least-significant-bit first.

8. The digital to analog converter of claim 7 wherein the switching circuitry is coupled to apply a positive reference voltage to the input capacitor when an applied bit of the digital code word has a first value, and to apply a negative reference voltage to the input capacitor when the applied bit of the digital code word has a second value.

9. The digital to analog converter of claim 7 further comprising a feedback amplifier to feed back an output voltage to the input capacitor when when neither of the two reference voltages is imposed.

10. The digital to analog converter of claim 7 further comprising a unity gain feedback amplifier.

11. A method comprising:

applying a reference voltage to an input capacitor of a cyclic digital to analog converter in response to a least significant bit of a digital word;

integrating the reference voltage to create an output voltage substantially equal to negative one half of the reference voltage;

feeding back the output voltage to the input capacitor; and

repeating the applying, integrating, and feeding back operations for remaining bits of the digital word applied from least-significant-bit to most-significant-bit.

12. The method of claim 11 wherein applying a reference voltage comprises applying a first reference voltage when the least significant bit has a first value, and applying a second reference voltage when the least significant bit has a second value.

13. The method of claim 11 wherein integrating the reference voltage comprises integrating the reference voltage with an operational amplifier having capacitive feedback.

14. An electronic system comprising:

an antenna; and

an integrated circuit to operate on signals received by the antenna, the integrated circuit including a port circuit having a digital to analog converter that includes an amplifier, a first capacitor coupled to an input node of the amplifier, a second capacitor coupled between the input node of the amplifier and an output node of the amplifier, wherein the second capacitor has a capacitance value substantially twice a capacitance value of the first capacitor, and at least one switching element coupled to the first capacitor, wherein the switching element is coupled to be responsive to a least-significant-bit first sequence of digital bits in a digital word.

15. The electronic system of claim 14 wherein the amplifier comprises an operational amplifier.

16. The electronic system of claim 14 further comprising a negative unity gain feedback path coupled between the output of the amplifier and the first capacitor.

17. The electronic system of claim 16 wherein the amplifier comprises a differential amplifier, and the negative unit gain feedback path includes switches to conditionally couple output nodes to input nodes with opposite polarity.