Gapless microlens array and method of fabrication

• US 7,199,931 B2
• Filed: 08/24/2005
• Issued: 04/03/2007
• Est. Priority Date: 10/09/2003
• Status: Active Grant

• Current Assignee: Aptina Imaging Corporation (ON Semiconductor Corporation)
• Original Assignee: Micron Technology, Inc.
• Inventors: Li, Jin, Boettiger, Ulrich C.
• Primary Examiner(s): Harrington; Alicia M
• Application Number:
  US11/209,695
• Publication Number:
  US 20060027887A1
• Time in Patent Office: 587 Days
• Field of Search: 359618-620, 359/626, 359/628, 257/292, 257/294, 257/432, 257/440, 257/443, 348/272, 348/308
• US Class Current: 359/619
• CPC Class Codes: B29D 11/00278 Lenticular sheets B29D11/00269 takes precedence
• CPC Class Codes: B29D 11/00365 Production of microlenses lenticular sheets B29D11/00278
• CPC Class Codes: G02B 3/0018 Reflow, i.e. characterized by the step of melting microstructures to form curved surfaces, e.g. manufacturing of moulds and surfaces for transfer etching
• CPC Class Codes: G02B 3/0043 Inhomogeneous or irregular arrays, e.g. varying shape, size, height
• CPC Class Codes: G02B 3/005 arranged along a single direction only, e.g. lenticular sheets G02B3/0043 takes precedence
• CPC Class Codes: G02B 3/0056 arranged along two different directions in a plane, e.g. honeycomb arrangement of lenses G02B3/0043 takes precedence; miniaturised objectives for electronic devices employing wafer level optics G02B13/0085
• CPC Class Codes: H01L 27/14603 Special geometry or disposition of pixel-elements, address-lines or gate-electrodes
• CPC Class Codes: H01L 27/14609 Pixel-elements with integrated switching, control, storage or amplification elements scanning details of imagers (circuitry of solid-state image sensors H04N25/00); circuitry of imagers H04N25/70
• CPC Class Codes: H01L 27/14621 Colour filter arrangements
• CPC Class Codes: H01L 27/14627 Microlenses
• CPC Class Codes: H01L 27/14641 Electronic components shared by two or more pixel-elements, e.g. one amplifier shared by two pixel elements
• CPC Class Codes: H01L 31/02327 the optical elements being integrated or being directly associated to the device, e.g. back reflectors optical coatings H01L31/0216
• CPC Class Codes: H04N 25/70 SSIS architectures; Circuits associated therewith
• CPC Class Codes: H04N 25/778 comprising amplifiers shared between a plurality of pixels, i.e. at least one part of the amplifier must be on the sensor array itself

Abstract

A microlens array with reduced or no empty space between individual microlenses and a method for forming the same. The microlens array is formed by patterning a first set of microlens precursors in a checkerboard pattern on a substrate. The first set of microlens precursors is reflowed and cured into first microlenses impervious to subsequent reflows. Then, a second set of microlens precursors is patterned in spaces among the first microlenses, reflowed and cured into second microlenses. The reflows and cures can be conducted under different conditions, and the microlenses may be differently sized. The conditions of the reflows can be chosen to ensure that the focal lengths of microlenses are optimized for maximum sensor signal.

Claims

1. An imager comprising:

a pixel cell array including a plurality of pixel cells arranged into a plurality of rows and columns, said array comprising;

at least first, second, and third pixel cells having corresponding first, second, and third photosensors, said first and second photosensors having a first distance between each other, and said second and third photosensors having a second distance between each other, said first and second distances being different from one another,

a common storage node shared by at least two of said first, second, and third photosensors,

a shared readout circuit connected to said common storage node, and

a substantially gapless microlens array formed over said pixel cell array, said microlens array having at least first, second, and third microlenses having a focal point corresponding to said first, second, and third photosensors of said pixel cell array.

2. The imager of claim 1, further comprising a color filter array between said pixel cell array and said microlens array.

3. The imager of claim 2, wherein said color filter array comprises at least first, second, and third color filters.

4. The imager of claim 3, wherein said first, second, and third color filters correspond to blue, green, and red color filters.

5. The imager of claim 3, wherein said first, second, and third color filters correspond to cyan, magenta, and yellow color filters.

6. The imager of claim 1, wherein each microlens of said microlens array has a focal plane that is substantially the same.

7. The imager of claim 1, wherein at least some microlenses of said microlens array have a focal plane that is different from other microlenses of said array.

8. The imager of claim 1, wherein each microlens of said microlens array has a thickness that is substantially the same.

9. The imager of claim 1, wherein said microlens array includes color sets of microlenses with each set of microlenses having a thickness corresponding to the set color.

10. The imager of claim 1, wherein said first distance is greater than said second distance.

11. The imager of claim 1, further comprising fourth and fifth pixel cells having fourth and fifth photosensors, and wherein said common storage node is shared by at least two of said first, second, and third photosensors and said fourth and fifth photosensor.

12. An integrated circuit, comprising:

a pixel cell array including a plurality of pixel cells arranged into a plurality of rows and columns, said array comprising;

at least first, second, and third pixel cells having corresponding first, second, and third photosensors, said first and second photosensors having a first distance between each other, and said second and third photosensors having a second distance between each other, said first and second distances being different from one another,

a common storage node shared by at least said first, second, and third photosensors,

a shared readout circuit connected to said common storage node, and

a substantially gapless microlens array formed over said pixel cell array, said microlens array having at least first, second, and third microlenses having a focal point corresponding to said first, second, and third photosensors of said pixel cell array.

13. The integrated circuit of claim 12, wherein each microlens of said array of microlenses has a distance between each other that is substantially the same.

14. The integrated circuit of claim 12, further comprising a color filter array between said pixel cell array and said microlens array.

15. The integrated circuit of claim 12, wherein said microlens array includes color sets of microlenses with each set of microlenses having a thickness corresponding to the set color.

16. A processor system, comprising:

a processor; and

an imager coupled to said processor, said imager comprising;

a pixel cell array formed in a substrate, said pixel cell array having an array of at least first, second, and third photosensors, a distance between said first and second photosensors being different than a distance between said second and third photosensors, and

an array of microlenses over said photosensor array, said microlens array having at least one microlens overlapping an adjacent microlens such that incoming photo radiation striking a top surface of at least one microlens at an orthogonal angle does not strike a photosensor of said corresponding pixel cell at an orthogonal angle after passing through said at least one microlens.

17. The processor system of claim 16, wherein at least two of said first, second, and third photosensors share a common storage node.

18. The processor system of claim 16, wherein said common storage node is coupled to a shared readout circuit.

19. The processor system of claim 16, wherein said pixel cell array further comprises fourth and fifth photosensors, wherein at least two of said first, second, third photosensors and said fourth and fifth photosensors share a common storage node and readout circuitry.

20. The processor system of claim 16, wherein said array of microlenses is substantially gapless.

21. The processor system of claim 16, wherein a thickness of each microlens of said array microlenses is selected from the group consisting of first, second, and third thicknesses.

22. The processor system of claim 21, wherein said first, second, and third thicknesses correspond to a first, second, and third wavelength.

23. A method of forming an imager, comprising:

providing a pixel cell array having at least one photosensor spaced unequally from surrounding photosensors;

patterning a first set of microlens precursors onto a substrate formed over said pixel cell array;

reflowing the first set of microlens precursors under first reflow conditions;

curing the first set of microlens precursors to form first microlenses;

patterning a second set of microlens precursors onto the substrate;

reflowing the second set of microlens precursors; and

curing the second set of microlens precursors to form second microlenses,

wherein the second microlenses are each positioned in a space among the first microlenses and have a shifted focal point such that photo radiation striking a top surface of said second microlens at an orthogonal angle does not strike said at least one photosensor at an orthogonal angle after passing through said second microlens.

24. The method of claim 23, wherein said first and second reflow conditions are chosen to create a focal length in said first microlenses substantially equal to a focal length in said second microlenses.

25. The method of claim 24, wherein said first and second reflow conditions are chosen to create a focal length in said first microlenses corresponding to a first wavelength of light and to create a focal length in said second microlenses corresponding to a second wavelength of light, wherein said first and second wavelengths are different.

26. The method of claim 23, wherein said patterning the first set of microlens precursors comprises patterning the first set of microlens precursors into a first plurality of portions arranged in a checkerboard pattern, the checkerboard pattern including spaces between said portions.

27. The method of claim 26, wherein said patterning the second set of microlens precursors comprises patterning the second set of microlens precursors into a second plurality of portions in a second checkerboard pattern filling in said spaces between the plurality of portions of the first set of microlens precursors.

28. The method of claim 23, further comprising:

patterning a third set of microlens precursors onto the substrate;

reflowing the third set of microlens precursors; and

curing the third set of microlens precursors to form third microlenses.

29. The method of claim 28, wherein the patterning and reflow conditions of said first set, second set, and third set of microlens precursors create a microlens array being substantially gapless.