Semiconductor device and method for fabricating the same

• US 7,202,147 B2
• Filed: 11/29/2005
• Issued: 04/10/2007
• Est. Priority Date: 11/30/2004
• Status: Active Grant

• Current Assignee: Pannova Semic, LLC (Vector Capital Corporation)
• Original Assignee: Matsushita Electric Industrial Company Limited (Panasonic Holdings Corporation)
• Inventors: Matsumoto, Michikazu, Okuno, Yasutoshi
• Primary Examiner(s): Smith; Matthew
• Assistant Examiner(s): Tobergte; Nicholas J.
• Application Number:
  US11/288,093
• Publication Number:
  US 20060138562A1
• Time in Patent Office: 497 Days
• Field of Search: 438/583, 438/582, 438/655, 438/664, 438/682, 257/377, 257/382, 257/384, 257/E29.161, 257/E21.139
• US Class Current: 438/582
• CPC Class Codes: H01L 21/26506 in group IV semiconductors
• CPC Class Codes: H01L 21/28518 the conductive layers comprising silicides H01L21/28537 takes precedence
• CPC Class Codes: H01L 21/823418 with a particular manufacturing method of the source or drain structures, e.g. specific source or drain implants or silicided source or drain structures or raised source or drain structures
• CPC Class Codes: H01L 21/823425 manufacturing common source or drain regions between a plurality of conductor-insulator-semiconductor structures
• CPC Class Codes: H01L 21/823443 silicided or salicided gate conductors
• CPC Class Codes: H01L 29/665 using self aligned silicidation, i.e. salicide formation of conductive layers comprising silicides H01L21/28518
• CPC Class Codes: H01L 29/6659 with both lightly doped source and drain extensions and source and drain self-aligned to the sides of the gate, e.g. lightly doped drain [LDD] MOSFET, double diffused drain [DDD] MOSFET
• CPC Class Codes: H01L 29/7833 with lightly doped drain or source extension, e.g. LDD MOSFET's; DDD MOSFET's for thin film transistors H01L29/78618

Abstract

A semiconductor device includes: a gate electrode formed on a silicon substrate; source/drain regions formed at both sides of the gate electrode in the silicon substrate; and a silicide layer formed on the source/drain regions. The silicide layer includes a first silicide layer mainly made of a metal silicide having a formation enthalpy lower than that of NiSi and a second silicide layer formed on the first silicide and made of Ni silicide.

Claims

1. A method for fabricationg a semiconductor device, the method comprising the steps of:

forming a gate electrode on a silicon substrate;

forming source/drain regions at both sides of the gate electrode in the silicon substrate; and

forming a silicide layer with a multilayer structure on the soure/drain regions,

wherein in the step of forming the silicide layer, a first silicide layer mainly made of a metal silicide having a formation enthalpy lower than that of NiSi is formed on the source/drain regions, and then a second silicide layer made of Ni silicide is formed on the first silicide layer.

4. The method of claim 1, wherein the metal silicide having a formation enthalpy lower than that of NiSi is a silicide made from a material selected from the group consisting of Hf, Zr, Mo, Ta and V.

2. A method for fabricating a semiconductor device , the steps of:

forming a gate electrode on a silicon substrate;

forming source/drain regions at both sides of the gate electrode in the silicon substrate; and

forming a silicide layer with a multilayer structure on the source/drain regions,

wherein in the step of forming the silicide layer, a metal capable of forming a metal silicide having a formation enthalpy lower than that of NiSi is introduced by ion implantation in the source/drain regions, then a Ni silicide film is formed on the source/drain regions, and then heat treatment is performed, thereby forming a first silicide layer which is an alloy layer made of Ni silicide and a metal silicide having a formation enthalpy lower than that of NiSi on the source/drain regions and also forming a second silicide layer made of Ni silicide on the first silicide layer.

5. The method of claim 2, wherein the metal silicide having a formation enthalpy lower than that of NiSi is a silicide made from a material selected from the group consisting of Hf, Zr, Mo, Ta and V.

3. A method for fabricating a semiconductor device, the method comprising the steps of:

forming a gate electrode on a silicon substrate;

forming source/drain regions at both sides of the gate electrode in the silicon substrate; and

forming a silicide layer with a multilayer structure on the source/drain regions,

wherein in the step of forming the silicide layer, a Ni silicide film is formed on the source/drain regions, then a metal capable of forming a metal silicide having a formation enthalpy lower than that of NiSi is introduced by ion implantation in at least a lower portion of the Ni silicide film and the Ni silicide film is changed into an amorphous state, and then the amorphous Ni silicide film is recrystallized by heat treatment, thereby forming a first silicide layer which is an alloy layer made of Ni silicide and a metal silicide having a formation enthalpy lower than that of NiSi on the source/drain regions and also forming a second silicide layer made of Ni silicide on the first silicide layer.

6. The method of claim 3, wherein the metal silicide having a formation enthalpy lower than that of NiSi is a silicide made from a material selected from the group consisting of Hf, Zr, Mo, Ta and V.