Voltage modulated driver circuits for electro-optic displays

• US 7,202,847 B2
• Filed: 06/27/2003
• Issued: 04/10/2007
• Est. Priority Date: 06/28/2002
• Status: Expired due to Term

• Current Assignee: E Ink Holdings Incorporated
• Original Assignee: E Ink Holdings Incorporated
• Inventors: Gates, Holly G.
• Primary Examiner(s): Hjerpe; Richard
• Assistant Examiner(s): Shapiro; Leonid
• Application Number:
  US10/609,119
• Publication Number:
  US 20040075634A1
• Time in Patent Office: 1,383 Days
• Field of Search: 345/98, 345/89, 345/204, 345691-692
• US Class Current: 345/98
• CPC Class Codes: G02F 1/167 by electrophoresis
• CPC Class Codes: G09G 2300/08 Active matrix structure, i.e. with use of active elements, inclusive of non-linear two terminal elements, in the pixels together with light emitting or modulating elements
• CPC Class Codes: G09G 2310/0254 Control of polarity reversal in general, other than for liquid crystal displays
• CPC Class Codes: G09G 2310/027 Details of drivers for data electrodes, the drivers handling digital grey scale data, e.g. use of D/A converters
• CPC Class Codes: G09G 2330/028 Generation of voltages supplied to electrode drivers in a matrix display other than LCD
• CPC Class Codes: G09G 2340/0428 Gradation resolution change
• CPC Class Codes: G09G 2340/16 Determination of a pixel data signal depending on the signal applied in the previous frame
• CPC Class Codes: G09G 3/2014 by modulation of the duration of a single pulse during which the logic level remains constant
• CPC Class Codes: G09G 3/2022 using sub-frames
• CPC Class Codes: G09G 3/2077 by a combination of two or more gradation control methods
• CPC Class Codes: G09G 3/2081 with combination of amplitude modulation and time modulation space and time error diffusion G09G3/2066
• CPC Class Codes: G09G 3/344 based on particles moving in a fluid or in a gas, e.g. electrophoretic devices electrophoretic devices per se G02F1/167

Abstract

A method and system for applying addressing voltages to pixels of a display involves receiving input data. The input data includes an indication of an addressing voltage impulse to be applied to a pixel via an electrode. One or more voltage sources are selected, to provide the addressing voltage impulse. The one or more voltage sources each have a pre-selected voltage. The selected one or more voltage sources are electrically connected to an electrode to apply the addressing voltage impulse to the pixel.

Claims

1. An addressing structure for addressing a display medium, the structure comprising:

a plurality of column electrodes, each of the column electrodes being connected via switch means to a plurality of pixel electrodes;

a plurality of voltage sources each having a different voltage level; and

a switch unit having a plurality of voltage source inputs each connected to one of the plurality of voltage sources, and a plurality of outputs each connected to one of the plurality of column electrodes, the switch unit being capable of connecting each of the column electrodes independently to selected ones of the plurality of voltage sources, the switch unit further comprising a blanking signal input arranged to receive a blanking signal, the switch unit being arranged so that, upon receipt of the blanking signal, all column electrodes are connected to the same voltage source.

2. An addressing structure according to claim 1 wherein the switch unit further comprises at least one display signal input arranged to receive a display signal specifying the voltages to be placed upon the column electrodes, and the switch unit is arranged to connect each of the column electrodes independently to selected ones of the plurality of voltage sources dependent upon the display signal.

3. An addressing structure according to claim 2 wherein the switch unit comprises one display signal input for each column electrode and the switch unit is arranged to connect each column electrode to a selected one of the plurality of voltage sources dependent upon the display signal received by the display signal input associated with the column electrode.

12. An electro-optic display comprising:

a transparent substrate bearing a single transparent common electrode;

an addressing structure according to claim 1; and

an electro-optic medium disposed between the pixel electrodes of the addressing structure and the common electrode, the common electrode extending across all the pixels of the display.

4. An addressing structure for addressing a display medium, the structure comprising:

a plurality of column electrodes, each of the column electrodes being connected via switch means to a plurality of pixel electrodes;

a plurality of voltage sources each having a different voltage level; and

a switch unit having a plurality of voltage source inputs each connected to one of the plurality of voltage sources, and a plurality of outputs each connected to one of the plurality of column electrodes, the switch unit being capable of connecting each of the column electrodes independently to selected ones of the plurality of voltage sources, the switch unit further comprising at least one display signal input arranged to receive a display signal specifying the voltages to be placed upon the column electrodes, and the switch unit is arranged to connect each of the column electrodes independently to selected ones of the plurality of voltage sources dependent upon the display signal, the addressing structure further comprising a data register for receiving sequentially data representing voltages to be applied to each of the column electrodes, and for storing said data, and data latching means for receiving said data from the data register, the at least one display signal input being connected to the data latching means.

5. An addressing structure for addressing a display medium, the structure comprising:

a plurality of column electrodes, each of the column electrodes being connected via switch means to a plurality of pixel electrodes;

a plurality of voltage sources each having a different voltage level; and

a switch unit having a plurality of voltage source inputs each connected to one of the plurality of voltage sources, and a plurality of outputs each connected to one of the plurality of column electrodes, the switch unit being capable of connecting each of the column electrodes independently to selected ones of the plurality of voltage sources,

the switch unit further comprising a plurality of multiplexing units, one multiplexing unit being connected to each column electrode, each multiplexing unit comprising a number of switches equal to the number of voltage sources inputs of the switch unit, each switch being capable of connecting its associated column electrode to its associated voltage source input, the multiplexing units being arranged to that, in each multiplexing unit only one of the switches is closed at any given time, all the other switches being open.

6. An addressing structure for addressing a display medium, the structure comprising:

a plurality of column electrodes, each of the column electrodes being connected via switch means to a plurality of pixel electrodes;

a plurality of voltage sources each having a different voltage level; and

a switch unit having a plurality of voltage source inputs each connected to one of the plurality of voltage sources, and a plurality of outputs each connected to one of the plurality of column electrodes, the switch unit being capable of connecting each of the column electrodes independently to selected ones of the plurality of voltage sources,

the switch unit further comprising a primary switch unit, a plurality of voltage rails, a plurality of secondary switch units each having an output connected to one column electrode, and sequencing means, the primary switch unit having voltage source inputs connected to the voltage source inputs of the switch unit, voltage rail outputs each connected to one voltage rail, and at least one control signal input arranged to receive a primary switch unit control signal from the sequencing means, each secondary switch unit having voltage rail inputs connected to each of the voltage rails and a control signal input arranged to receive a secondary switch unit control signal from the sequencing means, the sequencing means controlling the primary switch unit so that the voltage rails are connected to a first subset of the voltage source inputs of the primary switch unit during a first period, and to a second subset, different from said first subset, of the voltage source inputs of the primary switch unit during a second period, and each of the secondary switch units being arranged to connect their associated column electrode to a selected one of the voltage rails dependent upon the secondary switch unit control signal.

7. An addressing structure according to claim 6 wherein one voltage rail is maintained at the same voltage during the first and second periods.

8. An addressing structure according to claim 7 having at least three voltage rails, a first voltage rail maintained at the same voltage during the first and second periods, a second voltage rail maintained positive with respect to the first voltage rail during the first and second periods, and a third voltage rail maintained negative with respect to the first voltage rail during the first and second periods.

9. An addressing structure according to claim 6 wherein the sequencing means is arranged to receive a digital display signal comprising a plurality of digits defining the voltages to be applied to a given column electrode, and the sequencing means controls the secondary switch units such that the signal applied to that column electrode during the first period is defined by one digit of the digital display signal and the signal applied to that column electrode during the second period is defined by a second digit of the digital display signal.

10. An addressing structure according to claim 6 wherein the voltage sources comprise a voltage source having a central voltage at which the voltage rail is maintained during the first and second periods, a predetermined number of voltages greater than the central voltage and the same predetermined number of voltages less than the central voltage.

11. An addressing structure according to claim 10 wherein the differences between the central voltage and the predetermined number of voltages greater than the central voltage form a geometric series 1, 2, 4 etc. and the differences between the central voltage and the predetermined number of voltages less than the central voltage form a similar geometric series.

13. An electro-optic display comprising:

a transparent substrate bearing a single transparent common electrode;

an addressing structure according to claim 6; and

an electro-optic medium disposed between the pixel electrodes of the addressing structure and the common electrode, the common electrode extending across all the pixels of the display.

14. A method for addressing a display medium, the method comprising:

providing a plurality of voltage sources each having a different voltage level;

providing a plurality of column electrodes, each of the column electrodes being connected via switch means to a plurality of pixel electrodes, the pixel electrodes being arranged to apply electric fields to pixels of the display medium;

providing a switch unit having a plurality of voltage source inputs each connected to one of the plurality of voltage sources, and a plurality of outputs each connected to one of the plurality of column electrodes, the switch unit further comprising a display signal input arranged to receive a display signal, and a blanking signal input,

by means of the switch unit, connecting each of the column electrodes independently to selected ones of the voltage sources, the voltage source connected to each column electrode being controlled by the display signal; and

supplying a blanking signal to the blanking signal input and thereby causing the switch unit to connect all the column electrodes to the same voltage source.

15. A method according to claim 14 comprising receiving in a data register data representing the voltages to be applied to each of the column electrodes, storing said data in said data register, transferring said data to a data latching means, and generating the display signal dependent upon the data in the data latching means.

16. A method for addressing a display medium, the method comprising:

providing a plurality of voltage sources each having a different voltage level;

providing a plurality of column electrodes, each of the column electrodes being connected via switch means to a plurality of pixel electrodes, the pixel electrodes being arranged to apply electric fields to pixels of the display medium;

providing a switch unit having a plurality of voltage source inputs each connected to one of the plurality of voltage sources, and a plurality of outputs each connected to one of the plurality of column electrodes, the switch unit further comprising a display signal input arranged to receive a display signal, the switch unit further comprising a primary switch unit, a plurality of voltage rails, a plurality of secondary switch units each having an output connected to one column electrode, and sequencing means, the primary switch unit having voltage source inputs connected to the voltage source inputs of the switch unit, voltage rail outputs each connected to one voltage rail, and at least one control signal input arranged to receive a primary switch unit control signal from the sequencing means, each secondary switch unit having voltage rail inputs connected to each of the voltage rails and a control signal input arranged to receive a secondary switch unit control signal from the sequencing means,

by means of the switch unit, connecting each of the column electrodes independently to selected ones of the voltage sources, the voltage source connected to each column electrode being controlled by the display signal,

the method further comprising (a) during a first period, sending a first signal from the sequencing means to the primary switch unit so that the voltage rails are connected to a first subset of the voltage source inputs of the primary switch unit, and during the same first period sending second signals from , and to a second subset, different from said first subset, of the voltage source inputs of the primary switch unit during a second period, and each of the secondary switch units being arranged to connect their associated column electrode to a selected one of the voltage rails dependent upon the secondary switch unit control signal.