Selective metal encapsulation schemes

• US 7,205,228 B2
• Filed: 03/30/2004
• Issued: 04/17/2007
• Est. Priority Date: 06/03/2003
• Status: Expired due to Fees

• Current Assignee: Applied Materials Incorporated
• Original Assignee: Applied Materials Incorporated
• Inventors: Naik, Mehul, Gandikota, Srinivas, Parikh, Suketu A., Dixit, Girish A., Padhi, Deenesh
• Primary Examiner(s): MALSAWMA, LALRINFAMKIM HMAR
• Application Number:
  US10/812,480
• Publication Number:
  US 20040248409A1
• Time in Patent Office: 1,113 Days
• Field of Search: 438/670, 438652-654, 438642-644, 438/678, 257/E21.025, 257/E21.034
• US Class Current: 438/652
• CPC Class Codes: H01L 21/288 from a liquid, e.g. electrolytic deposition
• CPC Class Codes: H01L 21/76829 characterised by the formation of thin functional dielectric layers, e.g. dielectric etch-stop, barrier, capping or liner layers
• CPC Class Codes: H01L 21/76849 the layer being positioned on top of the main fill metal
• CPC Class Codes: H01L 21/7685 the layer covering a conductive structure H01L21/76849 takes precedence
• CPC Class Codes: H01L 21/76885 By forming conductive members before deposition of protective insulating material, e.g. pillars, studs

Abstract

A method and system of processing a semiconductor substrate includes, in one or more embodiments, depositing a protective layer on the substrate surface comprising a conductive element disposed in a dielectric material; processing the protective layer to expose the conductive element; electrolessly depositing a metallic passivating layer onto the conductive element; and removing at least a portion of the protective layer from the substrate after electroless deposition. In another aspect, a method and system of processing a semiconductor includes depositing a metallic passivating layer onto a substrate surface comprising a conductive element, masking the passivating layer to protect the underlying conductive element of the substrate surface, removing the unmasked passivating layer, and removing the mask from the passivating layer.

Claims

1. A method of processing a semiconductor substrate, comprising the steps of:

depositing a protective layer on a topographically substantially flat substrate surface comprising an exposed conductive element;

selectively removing a portion of the protective layer to expose the conductive element of the substrate surface;

selectively electrolessly depositing a metallic passivating layer onto the exposed conductive element, wherein discontinuous regions of stray metallic passivating material are also deposited on the protective layer; and

removing at least a portion of the protective layer from the substrate after deposition of the metallic passivating layer, wherein the stray metallic passivating material deposited on the protective layer is also removed.

2. The method of claim 1, wherein the substrate surface comprises a dielectric material in which the conductive element is disposed.

3. The method of claim 1, wherein the substrate surface comprises a low k dielectric material.

4. The method of claim 1, wherein a portion of the thickness of the protective layer is removed.

5. The method of claim 1, wherein the entire thickness of the protective layer is removed.

6. The method of claim 1, wherein the step of depositing a protective layer is accomplished using a technique selected from the group consisting of chemical vapor deposition (CVD), plasma enhance chemical vapor deposition (PECVD), spin on deposition and physical vapor deposition.

7. The method of claim 1, wherein the protective layer comprises an organic material.

8. The method of claim 7, wherein the organic material of the layer is selected from the group consisting of photoresist and amorphous carbon.

9. The method of claim 8, wherein the steps of depositing and processing the photoresist protective layer comprise the steps of:

depositing a photoresist over the substrate surface; and

exposing and developing the photoresist under conditions that do not degrade the substrate surface to expose a selected region of an underlying layer.

10. The method of claim 9, wherein the exposed and developed photoresist is removed after deposition of the metallic passivating layer by ashing or wet chemical etch.

11. The method of claim 8, wherein the steps of depositing and processing the amorphous carbon protective layer comprise the steps of:

depositing an amorphous carbon layer over the substrate surface; and

etching the amorphous carbon layer under conditions that do not degrade the substrate surface.

12. The method of claim 11, wherein the amorphous carbon layer is removed after deposition of the metallic passivating layer by ashing or reactive ion etch.

13. The method of claim 1, wherein the protective layer comprises a dielectric material.

14. The method of claim 13, wherein steps of depositing and processing the dielectric protective layer comprise the steps of:

depositing a dielectric layer over the substrate surface; and

selectively etching the dielectric layer under conditions that do not degrade the substrate surface.

15. The method of claim 14, wherein the dielectric protective layer is removed after deposition of the passivating layer by etching using a technique selected from the group consisting of wet etch, dry etch, reactive ion etch and plasma etch.

16. The method of claim 1, where steps for depositing and processing the protective layer comprise the steps of:

depositing an intermediate layer on the substrate surface;

depositing a protective layer on the intermediate layer;

selectively removing the protective layer to expose the intermediate layer; and

selectively removing the intermediate layer under conditions that do not degrade the conductive element.

17. The method of claim 16, wherein the intermediate layer comprises an etch stop and the protective layer comprises a photoresist.

18. The method of claim 16, wherein the intermediate layer comprises a dielectric material.

19. The method of claim 1, wherein the conductive material comprises copper.

20. The method of claim 1, wherein the passivating layer is selected from the group consisting of ruthenium, tantalum, tungsten, cobalt, palladium, nickel, tin, titanium, molybdenum, platinum, iron, and niobium, and alloys thereof.

21. The method of claim 1, wherein the step of electrolessly depositing a metallic passivating layer comprises the steps of:

depositing an initiation layer on the first conductive material by exposing the substrate to an activation solution;

cleaning the substrate after deposition of the initiation layer; and

depositing a metallic passivating layer on the initiation layer by exposing the initiation layer to an electroless solution.

22. A method of processing a semiconductor substrate, comprising:

steps for depositing a protective layer on a topographically substantially flat substrate surface comprising an exposed conductive element disposed in a dielectric material;

steps for processing the protective layer to expose the conductive element;

steps for selectively electrolessly depositing a metallic passivating layer onto the conductive element, wherein discontinuous regions of stray metallic passivating material are also deposited on the protective layer; and

steps for removing at least a portion of the protective layer from the substrate after electroless deposition, wherein the stray metallic passivating material deposited on the protective layer is also removed.

23. The method of claim 22, wherein the step of depositing a metallic passivating layer comprises the steps of:

steps for depositing an initiation layer on the first conductive material by exposing the substrate to an activation solution;

steps for cleaning the substrate after deposition of the initiation layer; and

steps for depositing a metallic passivating layer on the initiation layer by exposing the initiation layer to an electroless solution.

24. The method of claim 22, where steps for depositing and processing the protective layer comprise the steps of:

steps for depositing an intermediate layer on the substrate surface;

steps for depositing a protective layer on the intermediate layer;

steps for exposing and developing the protective layer to expose the intermediate layer; and

steps for etching the intermediate layer under conditions that do not degrade the conductive element.

25. The method of claim 22, wherein steps for depositing and processing an amorphous carbon protective layer comprise the steps of:

steps for depositing an amorphous carbon layer over the substrate surface; and

steps for etching the amorphous carbon layer under conditions that do not degrade the conductive element.

26. The method of claim 22, wherein the steps for depositing and processing a photoresist protective layer comprise the steps of:

steps for depositing a photoresist over the substrate surface; and

steps for exposing and developing the photoresist under conditions that do not degrade the conductive element.

27. The method of claim 22, wherein the steps of depositing and processing a dielectric protective layer comprise the steps of:

steps for depositing a dielectric protective layer over the substrate surface; and

steps for etching the dielectric protective layer under conditions that do not degrade the conductive element.

31. The system of claim 26, where steps for depositing and processing the protective layer comprises the steps of:

means for depositing an intermediate layer on the substrate surface;

means for depositing a protective layer on the intermediate layer;

means for exposing and developing the protective layer to expose the intermediate layer; and

means for etching the intermediate layer under conditions that do not degrade the conductive element.

32. The system of claim 26, wherein steps for depositing and processing an amorphous carbon protective layer comprises the steps of:

means for depositing an amorphous carbon layer over the substrate surface; and

means for etching the amorphous carbon layer under conditions that do not degrade the conductive element.

33. The system of claim 26, wherein depositing and processing a dielectric protective layer comprises:

means for depositing a dielectric layer over the substrate surface; and

means for etching the dielectric layer under conditions that do not degrade the conductive element.

28. A system for processing a semiconductor substrate, comprising:

means for depositing a protective layer on a topographically substantially flat substrate surface comprising an exposed conductive element disposed in a dielectric material;

means for processing the protective layer to expose the conductive element;

means for selectively electrolessly depositing a metallic passivating layer onto the conductive element, wherein discontinuous regions of stray metallic passivating material are also deposited on the protective layer; and

means for removing at least a portion of the protective layer from the substrate after electroless deposition, and for removing the stray metallic passivating material deposited on the protective layer.

29. The system of claim 28, wherein the steps for depositing and processing a photoresist protective layer comprises the steps of:

means for depositing a photoresist over the substrate surface; and

means for exposing and developing the photoresist under conditions that do not degrade the conductive element.

30. The system of claim 28, wherein the step of electrolessly depositing a metallic passivating layer comprises the steps of:

means for depositing an initiation layer on the first conductive material by exposing the substrate to an activation solution;

means for cleaning the substrate after deposition of the initiation layer; and

steps for depositing a metallic passivating layer on the initiation layer by exposing the initiation layer to an electroless solution.