×

Power line communication using power factor correction circuits

  • US 7,205,749 B2
  • Filed: 02/28/2005
  • Issued: 04/17/2007
  • Est. Priority Date: 02/28/2005
  • Status: Active Grant
First Claim
Patent Images

1. A power factor correction (PFC) circuit, comprising:

  • a pulse width modulator (PWM) providing a PWM control signal;

    a power MOSFET adapted to control a line current drawn from a power line based on the PWM control signal; and

    wherein the PWM control signal is constructed so that both a 50 Hz and 60 Hz said line current is controlled to maintain a desired power factor and a higher frequency current is applied to the power line to implement the transmission of a Power Line Communications (PLC) waveform.

View all claims
  • 1 Assignment
Timeline View
Assignment View
    ×
    ×