Driver for switching circuit and drive method
First Claim
Patent Images
1. A drive circuit for a switching circuit, comprising:
- first and second gate control outputs for connection to gates of respective first and second insulated gate transistors;
first and second gate drivers connected to the first and second gate control outputs respectively for driving the respective gates to switch the first and second insulated gate transistors on and off alternately;
monitoring circuitry for monitoring voltages on first and second monitor points and hence a state of the first and second insulated gate transistors respectively, the first monitor point being one of the gate of the first insulated gate transistor and a switch node between first and second insulated gate transistors and the second monitor point being the gate of the second insulated gate transistor;
wherein the drive circuit is arranged;
to drive the second gate driver to switch off the second insulated gate transistor and then after a first controllable delay to drive the first gate driver to switch on the first insulated gate transistor;
to compare a first time that the voltage on the first monitor point passes a first predetermined voltage and a second time that the voltage on the second monitor point passes a second predetermined voltage; and
to decrease the first controllable delay if the second time is before the first time and to increase the first controllable delay if the second time is after the first time.
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Abstract
A driver circuit includes monitoring circuitry (32, 34, 36) for monitoring the states of high and low side switches (6, 8). The driver circuit has an adjustable delay for turning on the transistors (6, 8). The delay is decreased when the monitoring circuit detects that a voltage corresponding to one transistor passes a predetermined voltage V1 before a voltage corresponding to the other transistor passes another predetermined point V2, and vice versa.
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Citations
13 Claims
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1. A drive circuit for a switching circuit, comprising:
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first and second gate control outputs for connection to gates of respective first and second insulated gate transistors; first and second gate drivers connected to the first and second gate control outputs respectively for driving the respective gates to switch the first and second insulated gate transistors on and off alternately; monitoring circuitry for monitoring voltages on first and second monitor points and hence a state of the first and second insulated gate transistors respectively, the first monitor point being one of the gate of the first insulated gate transistor and a switch node between first and second insulated gate transistors and the second monitor point being the gate of the second insulated gate transistor; wherein the drive circuit is arranged; to drive the second gate driver to switch off the second insulated gate transistor and then after a first controllable delay to drive the first gate driver to switch on the first insulated gate transistor; to compare a first time that the voltage on the first monitor point passes a first predetermined voltage and a second time that the voltage on the second monitor point passes a second predetermined voltage; and to decrease the first controllable delay if the second time is before the first time and to increase the first controllable delay if the second time is after the first time. - View Dependent Claims (2, 3, 4, 5, 6, 7)
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8. A switching converter circuit, comprising:
- control and sync insulated gate transistors each having a gate, a source and a drain, the control and sync insulated gate transistors being connected together in series at a switch node for driving a load; and
a drive circuit connected to the gates of the control and sync insulated gate transistors for switching the control and sync insulated gate transistors on and off alternately; wherein the drive circuit is arranged; to switch off the sync insulated gate transistor and switch on the control insulated gate transistor after a delay; to monitor voltages at first and second monitoring points, the first monitor point being the switch node or the gate of the control transistor and the second monitor point being the gate of the sync transistor; to compare the a first time that the voltage en at the first monitoring point rises above a first predetermined voltage and a second time that the voltage at the second monitoring point falls below a second predetermined voltage; and to decrease the delay if the second time is before the first time and to increase the delay if the second time is after the first time.
- control and sync insulated gate transistors each having a gate, a source and a drain, the control and sync insulated gate transistors being connected together in series at a switch node for driving a load; and
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9. A method of driving a converter circuit having first and second insulated gate transistors each having, a gate, a source and a drain, the method including the steps of:
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(a) switching off the first insulated gate transistor; (b) switching on the second insulated gate transistor after a first a delay; (c) monitoring voltages at first and second monitor points, the first monitor points being one of the gate of the first insulated gate transistor and a switch node that is between first and second insulated gate transistors, and the second monitor point being the gate of the second insulated gate transistor; and (d) comparing a first time that the voltage at the first monitor point passes a first predetermined voltage and a second time that the voltage at the second monitor point passes above a second predetermined voltage; (e) decreasing the first delay if the second time is after the first time and increasing the first delay if the second time is before the first time; and (f) switching on the first and second transistors alternately, repeating steps (a) to (c) above when switching on the second transistor and switching off the first transistor. - View Dependent Claims (10, 11, 12, 13)
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Specification