×

Tamper detection and secure power failure recovery circuit

  • US 7,205,883 B2
  • Filed: 10/07/2002
  • Issued: 04/17/2007
  • Est. Priority Date: 10/07/2002
  • Status: Active Grant
First Claim
Patent Images

1. A security system comprising:

  • a token comprising;

    non-volatile random access memory (NVRAM) for storing security data for use during a step of secure authentication;

    an interface for providing communication between the token and a host system when coupled thereto; and

    a processor for performing the steps of;

    receiving authentication data via the interface;

    authenticating the token for performing security functions in response to correct authentication data;

    providing secure information via the interface in response to the correct authentication data;

    storing security data relating to the secure information within the NVRAM of the token in response to correct authentication data; and

    re-authenticating the token for performing security functions using the security data stored in the NVRAM of the token in response to receipt of the secure information after a reset of the token has occurred.

View all claims
  • 13 Assignments
Timeline View
Assignment View
    ×
    ×