Non-volatile flip flop
First Claim
1. A non-volatile flip flop comprising:
- a flip flop section having a pair of memory nodes for storing a pair of inverse logic data elements; and
a pair of non-volatile resistance change elements which are connected to the pair of memory nodes respectively and the resistances of which vary so as to be retainable;
wherein, in a store operation, the resistances of the pair of non-volatile resistance change elements can be varied according to the respective potentials of the pair of memory nodes and, in a recall operation, the pair of memory nodes can be placed at potentials respectively according to the difference in resistance between the pair of non-volatile resistance change elements.
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Accused Products
Abstract
A non-volatile flip flop according to the invention comprising: a flip flop section (4) having a pair of memory nodes (5, 6) for storing a pair of inverse logic data elements; and a pair of non-volatile resistance change elements (11, 12) which are connected to the pair of memory nodes (5, 6) through switching elements (9, 10) respectively and the resistances of which vary so as to be retainable, wherein, in a store operation, the resistances of the pair of non-volatile resistance change elements (11, 12) can be varied according to the respective potentials of the pair of memory nodes (5, 6) and, in a recall operation, the pair of memory nodes (5, 6) can be placed at potentials respectively according to the difference in resistance between the pair of non-volatile resistance change elements (11, 12).
52 Citations
21 Claims
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1. A non-volatile flip flop comprising:
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a flip flop section having a pair of memory nodes for storing a pair of inverse logic data elements; and a pair of non-volatile resistance change elements which are connected to the pair of memory nodes respectively and the resistances of which vary so as to be retainable; wherein, in a store operation, the resistances of the pair of non-volatile resistance change elements can be varied according to the respective potentials of the pair of memory nodes and, in a recall operation, the pair of memory nodes can be placed at potentials respectively according to the difference in resistance between the pair of non-volatile resistance change elements. - View Dependent Claims (2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 16, 17, 18, 19, 20, 21)
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Specification