Method and apparatus for synthesizing high-frequency signals for wireless communications

• US 7,209,011 B2
• Filed: 06/06/2005
• Issued: 04/24/2007
• Est. Priority Date: 05/25/2000
• Status: Expired due to Term

• Current Assignee: Silicon Laboratories Incorporated
• Original Assignee: Silicon Laboratories Incorporated
• Inventors: Welland, David R., Pavelka, John B., Healy, Edmund G.
• Primary Examiner(s): KINKEAD, ARNOLD M
• Application Number:
  US11/146,337
• Publication Number:
  US 20050242897A1
• Time in Patent Office: 687 Days
• Field of Search: 331/108.C, 331/36.L, 257/531, 438/238
• US Class Current: 331/36.00L
• CPC Class Codes: H01L 2223/6611 Wire connections
• CPC Class Codes: H01L 2224/0401 Bonding areas specifically adapted for bump connectors, e.g. under bump metallisation [UBM]
• CPC Class Codes: H01L 2224/05554 being square
• CPC Class Codes: H01L 2224/05599 Material
• CPC Class Codes: H01L 2224/16 of an individual bump connector
• CPC Class Codes: H01L 2224/16225 the item being non-metallic, e.g. insulating substrate with or without metallisation
• CPC Class Codes: H01L 2224/45099 Material
• CPC Class Codes: H01L 2224/48091 Arched
• CPC Class Codes: H01L 2224/48227 connecting the wire to a bond pad of the item
• CPC Class Codes: H01L 2224/48247 connecting the wire to a bond pad of the item
• CPC Class Codes: H01L 2224/49113 the connectors connecting different bonding areas on the semiconductor or solid-state body to a common bonding area outside the body, e.g. converging wires
• CPC Class Codes: H01L 2224/49171 Fan-out arrangements
• CPC Class Codes: H01L 23/66 High-frequency adaptations
• CPC Class Codes: H01L 24/48 of an individual wire connector
• CPC Class Codes: H01L 24/49 of a plurality of wire connectors
• CPC Class Codes: H01L 2924/00 Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
• CPC Class Codes: H01L 2924/00012 Relevant to the scope of the group, the symbol of which is combined with the symbol of this group
• CPC Class Codes: H01L 2924/00014 the subject-matter covered by the group, the symbol of which is combined with the symbol of this group, being disclosed without further technical details
• CPC Class Codes: H01L 2924/01006 Carbon [C]
• CPC Class Codes: H01L 2924/01015 Phosphorus [P]
• CPC Class Codes: H01L 2924/014 : Solder alloys
• CPC Class Codes: H01L 2924/14 : Integrated circuits
• CPC Class Codes: H01L 2924/15192 : Resurf arrangement of the internal vias
• CPC Class Codes: H01L 2924/15311 : being a ball array, e.g. BGA
• CPC Class Codes: H01L 2924/15787 : Ceramics, e.g. crystalline carbides, nitrides or oxides
• CPC Class Codes: H01L 2924/181 : Encapsulation
• CPC Class Codes: H01L 2924/19041 : being a capacitor
• CPC Class Codes: H01L 2924/19042 : being an inductor
• CPC Class Codes: H01L 2924/30105 : Capacitance
• CPC Class Codes: H01L 2924/30107 : Inductance
• CPC Class Codes: H03L 7/099 : concerning mainly the controlled oscillator of the loop
• CPC Class Codes: H03L 7/104 : using an additional signal from outside the loop for setting or controlling a parameter in the loop H03L7/107, H03L7/12 take precedence
• CPC Class Codes: H03L 7/18 : using a frequency divider or counter in the loop H03L7/20, H03L7/22 take precedence
• CPC Class Codes: H03L 7/199 : with reset of the frequency divider or the counter, e.g. for assuring initial synchronisation

Abstract

A semiconductor package includes a package substrate and an integrated circuit. The package substrate has a first surface. The integrated circuit couples electrically to the first surface of the package substrate. The integrated circuit and the package substrate together form the semiconductor package. The semiconductor package also includes a first inductance circuit and a second inductance circuit, both formed within the semiconductor package. The first and second inductance circuits couple to each other in parallel. The first and second inductance circuits have substantially symmetrical geometric characteristics.

Claims

1. A semiconductor package comprising:

a package substrate having a first surface;

an integrated circuit electrically connected to said package substrate, said integrated circuit and said package substrate together forming said semiconductor package, the integrated circuit and package substrate including frequency synthesizer circuitry;

at least one inductance circuit formed entirely within said semiconductor package and formed at least partially between said integrated circuit and said package substrate, the inductance circuit at least in part determining an output frequency for the frequency synthesizer circuitry; and

at least a first substrate electrical contact disposed on said package substrate and at least a second substrate electrical contact disposed on said package substrate,

wherein said inductance circuit is formed at least in part by a first conductive feature electrically coupled between said integrated circuit and said first substrate electrical contact and a second conductive feature electrically coupled between said integrated circuit and said second substrate electrical contact,

wherein said first substrate electrical contact and said second substrate electrical contact being electrically coupled by a third conductive feature, and

wherein said first, second and third electrical features form an electrically conductive path.

2. The semiconductor package of claim 1, wherein the first and second conductive features are wirebonds.

3. The semiconductor package of claim 1, wherein the first and second conductive features are solder bumps.

4. The semiconductor package of claim 1, wherein said third conductive feature is a feature of said substrate.

5. The semiconductor package of claim 1, wherein said third conductive feature is a feature in said substrate.

6. The semiconductor package of claim 1, wherein said third conductive feature is a portion of said substrate.

7. The semiconductor package of claim 1, wherein the substrate is a bonding pad lead.

8. The semiconductor package of claim 1, wherein the substrate is a lead frame structure.

9. The semiconductor package of claim 1, wherein said frequency synthesizer circuitry has an output frequency selectably operable within one frequency band.

10. The semiconductor package of claim 1, wherein said frequency synthesizer circuitry has an output frequency selectably operable within a plurality of frequency bands.

11. The semiconductor package of claim 1, wherein a first inductor circuit bonding pad is connected to a second inductor circuit bonding pad with a third conductive inductor circuit connection feature to complete an induction loop circuit.

12. The semiconductor package of claim 11, wherein said third conductive inductor circuit connection feature is constructed of same material as said first and second inductor circuit bonding pads.

13. The semiconductor package of claim 12, wherein varying any one of geometry, length, and material selection of inductive connective features impacts inductance value between alternative selected pairs of substrate inductor circuit bonding pads.

14. The semiconductor package of claim 12, wherein inductance is impacted by spacing between said first and second conductive features.

15. The semiconductor package of claim 12, wherein inductance is impacted by size of said third conductive feature.

16. A frequency synthesizer for generating output signals in at least one band of frequency, comprising:

a package substrate having a plurality of substrate electrical contacts;

an integrated circuit connected to said package substrate and having a plurality of integrated circuit electrical contacts;

a frequency synthesizer circuit having a variable output frequency, the frequency synthesizer circuit including a controlled oscillator circuit within a phase locked loop circuit; and

at least one inductance circuit formed at least partially between said integrated circuit and said package substrate, said at least one inductance circuit providing at least a portion of an on-package inductor, the on-package inductor providing an inductance value for use with the controlled oscillator circuit, the inductance circuit comprising;

at least a first substrate electrical contact disposed on said package substrate and at least a second substrate electrical contact disposed on said package substrate, and

a third substrate conductive feature electrically coupling the first substrate electrical contact and the second substrate electrical contact,

wherein said inductance circuit is formed at least in part by a first conductive feature electrically coupled between said integrated circuit and said first substrate electrical contact and a second conductive feature electrically coupled between said integrated circuit and said second substrate electrical contact, and

wherein said first, second and third electrical features form an electrically conductive path of at least a portion of said inductance circuit.

17. The frequency synthesizer of claim 16, wherein said third conductive feature is a feature of said substrate.

18. The frequency synthesizer of claim 16, wherein said third conductive feature is a feature in said substrate.

19. The frequency synthesizer of claim 16, wherein said third conductive feature is a portion of said substrate.

20. The frequency synthesizer of claim 16, wherein the substrate is a bonding pad lead.

21. The frequency synthesizer of claim 16, wherein said frequency synthesizer circuitry has an output frequency selectably operable within one frequency band.

22. The frequency synthesizer of claim 16, wherein said frequency synthesizer circuitry has an output frequency selectably operable within a plurality of frequency bands.

23. The frequency synthesizer of claim 16, wherein a first inductor circuit bonding pad is connected to a second inductor circuit bonding pad with a third conductive inductor circuit connection feature to complete an induction loop circuit.

24. The frequency synthesizer of claim 23, wherein said third conductive inductor circuit connection feature is constructed of same material as said first and second inductor circuit bonding pads.

25. The frequency synthesizer of claim 24, wherein varying any one of geometry, length, and material selection of inductive connective features impacts inductance value between alternative selected pairs of substrate inductor circuit bonding pads.