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Memory device with clock multiplier circuit

  • US 7,209,397 B2
  • Filed: 03/31/2005
  • Issued: 04/24/2007
  • Est. Priority Date: 04/24/2001
  • Status: Expired due to Term
First Claim
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1. A memory device comprising:

  • clock generation circuitry to receive a first clock signal having a first frequency and to generate a second clock signal having a second frequency that is a multiple of, and higher than, the first frequency; and

    a data receive circuit to receive data from an external signal path at the second frequency of the second clock signal.

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