Implantable medical device construction using a flexible substrate

• US 7,211,884 B1
• Filed: 01/28/2002
• Issued: 05/01/2007
• Est. Priority Date: 01/28/2002
• Status: Expired due to Fees

• Current Assignee: Pacesetter Incorporated (Abbott Laboratories Incorporated)
• Original Assignee: Pacesetter Incorporated (Abbott Laboratories Incorporated)
• Inventors: Mouchawar, Gabriel A., Davis, Dion F., Weinberg, Alvin H.
• Primary Examiner(s): Pham; Hoai
• Assistant Examiner(s): Nguyen; DiLinh
• Application Number:
  US10/059,739
• Time in Patent Office: 1,919 Days
• Field of Search: 257/685, 257/686, 257/723, 257/787, 257790-793, 257/773, 257/789, 257/730, 257/704, 257/706, 257/784, 257/786
• US Class Current: 257/685
• CPC Class Codes: A61B 5/0031 Implanted circuitry
• CPC Class Codes: A61N 1/3758 Packaging of the components within the casing
• CPC Class Codes: H01L 2224/05599 Material
• CPC Class Codes: H01L 2224/32145 the bodies being stacked
• CPC Class Codes: H01L 2224/45015 being circular
• CPC Class Codes: H01L 2224/45124 Aluminium (Al) as principal constituent
• CPC Class Codes: H01L 2224/45144 Gold (Au) as principal constituent
• CPC Class Codes: H01L 2224/48091 Arched
• CPC Class Codes: H01L 2224/48227 connecting the wire to a bond pad of the item
• CPC Class Codes: H01L 2224/4911 the connectors being bonded to at least one common bonding area, e.g. daisy chain
• CPC Class Codes: H01L 2224/49171 Fan-out arrangements
• CPC Class Codes: H01L 2224/73265 Layer and wire connectors
• CPC Class Codes: H01L 2225/0651 Wire or wire-like electrical connections from device to substrate
• CPC Class Codes: H01L 2225/06572 Auxiliary carrier between devices, the carrier having an electrical connection structure
• CPC Class Codes: H01L 23/057 the leads being parallel to the base
• CPC Class Codes: H01L 23/13 characterised by the shape
• CPC Class Codes: H01L 23/5386 Geometry or layout of the interconnection structure
• CPC Class Codes: H01L 23/5387 Flexible insulating substrates H01L23/5388 takes precedence
• CPC Class Codes: H01L 24/45 of an individual wire connector
• CPC Class Codes: H01L 24/48 of an individual wire connector
• CPC Class Codes: H01L 24/49 : of a plurality of wire connectors
• CPC Class Codes: H01L 25/0652 : the devices being arranged next and on each other, i.e. mixed assemblies
• CPC Class Codes: H01L 25/0657 : Stacked arrangements of devices
• CPC Class Codes: H01L 25/16 : the devices being of types provided for in two or more different main groups of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. forming hybrid circuits
• CPC Class Codes: H01L 2924/00 : Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
• CPC Class Codes: H01L 2924/00014 : the subject-matter covered by the group, the symbol of which is combined with the symbol of this group, being disclosed without further technical details
• CPC Class Codes: H01L 2924/01078 : Platinum [Pt]
• CPC Class Codes: H01L 2924/01079 : Gold [Au]
• CPC Class Codes: H01L 2924/1305 : Bipolar Junction Transistor [BJT]
• CPC Class Codes: H01L 2924/13055 : Insulated gate bipolar transistor [IGBT]
• CPC Class Codes: H01L 2924/14 : Integrated circuits
• CPC Class Codes: H01L 2924/16152 : Cap comprising a cavity for hosting the device, e.g. U-shaped cap
• CPC Class Codes: H01L 2924/19041 : being a capacitor
• CPC Class Codes: H01L 2924/19105 : in a side-by-side arrangement on a common die mounting substrate
• CPC Class Codes: H01L 2924/19107 : off-chip wires
• CPC Class Codes: H01L 2924/3025 : Electromagnetic shielding
• CPC Class Codes: H05K 1/0254 : High voltage adaptations; Electrical insulation details; Overvoltage or electrostatic discharge protection electrostatic discharge protection for electric apparatus in general H05K9/0067, H05K9/0079; Arrangements for regulating voltages or for using plural voltages
• CPC Class Codes: H05K 1/141 : One or more single auxiliary printed circuits mounted on a main printed circuit, e.g. modules, adapters H05K1/142 and H05K1/147 take precedence
• CPC Class Codes: H05K 1/189 : characterised by the use of a flexible or folded printed circuit H05K3/326 takes precedence
• CPC Class Codes: H05K 2203/049 : Wire bonding

Abstract

A high density electronic circuit for use in an implantable stimulation device that comprises a flexible substrate that has the advantage of integrating “chip-and-wire” microelectronic circuits and flexible interconnections that are adapted to conform to the body compatible housing into a single structure. The flexible substrate has die attach pads, each die attach pad having a set of wire bond pads therearound, each wire bond pad being connected to conductors formed within the substrate according to circuit function. A plurality of chip-and-wire integrated circuit (IC) chips are mounted by epoxy die attachment on the die attach pads, each IC chip has a plurality of contact pads formed on a top surface thereof, and gold wire bonds electrically connect the plurality of contact pads to the wire bonds pads. The wire bonds include a primary bond and, optionally, a safety bond for reinforcement. Other techniques are disclosed to enable the use of the gold wire bonds on a flexible substrate.

Claims

1. In an implantable medical device, a high density microelectronic package, comprising:

a primary substrate made of thin, highly flexible and foldable, high dielectric strength material, the primary substrate having a top side and a bottom side with a plurality of conductive and non-conductive interconnect layers therebetween, the primary substrate having die attach pads on the top side, each die attach pad having a plurality of wire bond pads therearound, each wire bond pad being connected to the conductive interconnect layers according to circuit function;

a plurality of chip-and-wire VLSI circuit chips mounted on the die attach pads, each VLSI circuit chip have a plurality of contact pads formed on a top surface thereof; and

a plurality of gold wire bonds that electrically connect the plurality of contact pads to a respective wire bond pad;

wherein each of the wire bond pads has about 50 micro-inches of gold plating thereon; and

wherein the primary substrate comprises a fold area and wherein the primary substrate is adapted to be folded at the fold area to vertically integrate the primary substrate; and

wherein the primary substrate comprises a first assembly area and a second assembly area, wherein the primary substrate is folded at the fold area to vertically integrate the first assembly area with the second assembly area, and wherein the first assembly area is connected with the second assembly area only at the fold area.

2. The high density microelectronic circuit, as recited in claim 1, wherein:

the plurality of gold wire bonds for the plurality of contact pads are gold wire bonds at least 0.001 inches in diameter.

3. The high density microelectronic circuit, as recited in claim 2, wherein the gold wire bonds are reinforced with a safety bond.

4. The high density microelectronic circuit, as recited in claim 1, further comprising:

high voltage circuitry that are interconnected using high current carrying conductors; and

aluminum wire bonds for connecting the high voltage circuitry to the high current carrying conductors, the aluminum wire bonds comprising at least 0.008 inches in diameter.

5. The high density microelectronic circuit, as recited in claim 1, wherein the plurality of chip-and-wire VLSI circuit chips are encapsulated subsequent to the attachment of the wire bonds with non-conductive epoxy, thereby protecting the integrated circuit chips and making the flexible substrate rigid.

6. The high density microelectronic circuit, as recited in claim 5, wherein the plurality of chip-and-wire VLSI integrated circuit chips are encapsulated with non-conductive epoxy within a ring frame, wherein the ring frame controls the height and area of the encapsulation.

7. The high density microelectronic circuit, as recited in claim 1, wherein at least two of the plurality of the VLSI circuit chips share wire bond pads to increase packaging density.

8. The high density microelectronic circuit, as recited in claim 1, wherein at least two of the plurality of the VLSI circuit chips are stacked in with a similar pad-out so that wire bond pads are shared so as to increase packaging density.

9. The high density microelectronic circuit, as recited in claim 8, wherein the at least two stacked VLSI circuit chips are mounted using a die-on-die configuration so as to further increase packaging density.

10. The high density microelectronic circuit, as recited in claim 1, wherein the flexible substrate further comprises additional components on the bottom side.

11. The high density microelectronic circuit, as recited in claim 1, wherein the flexible substrate comprises folded connection tabs that conform to external components including at least one of a battery connection tab, a telemetry connection tab, and a feedthrough tab.

12. The high density microelectronic circuit, as recited in claim 11, wherein the daughterboard can be mounted planar or perpendicular onto the flexible substrate, the flexible substrate further comprising a connection tab that can be folded to mate to the daughterboard.

13. The high density microelectronic circuit, as recited in claim 1, further comprising a daughterboard mounted onto the flexible substrate.

14. The high density microelectronic circuit, as recited in claim 1, wherein the primary substrate comprises a low voltage assembly area and a high voltage assembly area, and wherein the primary substrate is folded at the fold area to vertically integrate the low voltage assembly area with the high voltage assembly area.

15. The high density microelectronic circuit, as recited in claim 1, wherein the first assembly area has a first side and the second assembly area has a second side, wherein the first side is in opposition with the second side, and wherein the first assembly area and the second assembly area are parallel and spaced from one another so as to define a space between the first side and the second side.

16. In an implantable medical device, a high density microelectronic package, comprising:

a primary substrate made of thin, highly flexible and foldable, high dielectric strength material, the primary substrate having a top side and a bottom side with a plurality of conductive and non-conductive interconnect layers therebetween, the primary substrate having die attach pads on the top side, each die attach pad having a plurality of wire bond pads therearound, each wire bond pad being connected to the conductive interconnect layers according to circuit function;

a plurality of chip-and-wire VLSI circuit chips mounted on the die attach pads, each VLSI circuit chip have a plurality of contact pads formed on a top surface thereof;

a plurality of gold wire bonds that electrically connect the plurality of contact pads to a respective wire bond pad; and

a predetermined amount of electrolytic pattern-plated gold on each of the VLSI wire bond pads, the predetermined amount being sufficient to ensure adherence with the gold wire bonds;

wherein the primary substrate comprises a fold area and wherein the primary substrate is adapted to be folded at the fold area to vertically integrate the primary substrate; and

wherein the primary substrate comprises a first assembly area and a second assembly area, and wherein the primary substrate is folded at the fold area to vertically integrate the first assembly area with the second assembly area, and wherein the first assembly area is connected with the second assembly area only at the fold area.

17. The high density microelectronic package, as recited in claim 16, wherein the primary substrate comprises a low voltage assembly area and a high voltage assembly area, and wherein the primary substrate is folded at the fold area to vertically integrate the low voltage assembly area with the high voltage assembly area.

18. The high density microelectronic package, as recited in claim 16, wherein the primary substrate comprises folded connection tabs that conform to external components including at least one of a battery connection tab, a telemetry connection tab, and a feedthrough tab.

19. The high density microelectronic package, as recited in claim 18, further comprising a daughterboard mounted onto the flexible substrate.

20. The high density microelectronic circuit, as recited in claim 16, wherein the first assembly area has a first side and the second assembly area has a second side, wherein the first side is in opposition with the second side, and wherein the first assembly area and the second assembly area are parallel and spaced from one another so as to define a space between the first side and the second side.