Contactless circuit testing for adaptive wafer processing

• US 7,215,133 B2
• Filed: 01/30/2004
• Issued: 05/08/2007
• Est. Priority Date: 01/30/2004
• Status: Expired due to Fees

• Current Assignee: International Business Machines Corporation
• Original Assignee: International Business Machines Corporation
• Inventors: Kwark, Young Hoon
• Primary Examiner(s): Nguyen; Ha Tran
• Assistant Examiner(s): Chan; Emily Y
• Application Number:
  US10/769,115
• Publication Number:
  US 20050168234A1
• Time in Patent Office: 1,194 Days
• Field of Search: 324/765
• US Class Current: 324/762.03
• CPC Class Codes: G01R 31/2884 using dedicated test connectors, test elements or test circuits on the IC under test G01R31/2855 takes precedence
• CPC Class Codes: G01R 31/311 of integrated circuits G01R31/31728 takes precedence

Abstract

A system and method for measuring circuits on an integrated circuit substrate includes a measurement circuit formed on the integrated circuit substrate that measures at least one characteristic of an integrated circuit. The measurement circuit has a power transfer device including a power transfer component, which receives energy from a source where the source does not make physical contact with the integrated circuit substrate to transfer power to the measurement circuit. Measurements are taken to provide feedback for in-situ adjustments to circuit parameters and responses.

Claims

1. A system for measuring circuits on an integrated circuit substrate, comprising:

a semiconductor wafer including a plurality of chips;

a measurement circuit formed on at least one of the chips, the measurement circuit configured to measure at least one characteristic of a partially fabricated integrated circuit,

the measurement circuit including a power transfer component which receives energy from a source where the source does not make physical contact with the semiconductor wafer to transfer power to the measurement circuit, the measurement circuit including components that mirror behavior of the partially fabricated integrated circuit so that process parameters are measured for the components to provide information about processing steps and provide information for determining actions to remedy problems prior to completing fabrication of integrated circuits on the wafer; and

a test device including the source, which delivers energy to the power transfer component of the measurement circuit when in alignment with the power transfer component wherein the test device includes a thin film dielectric membrane having the source mounted thereon.

2. The system as recited in claim 1, wherein the measurement circuit is formed in a kerf area of the chip.

3. The system as recited in claim 1, wherein the power transfer component includes an inductor coil and the source transfers energy via inductive coupling.

4. The system as recited in claim 1, wherein the power transfer component includes a photo sensor and the source transfers energy via light.

5. The system as recited in claim 4, wherein the photo sensor includes a photodiode and the source includes a laser.

6. The system as recited in claim 1, wherein the power transfer component includes a capacitor and the source transfers energy via capacitive coupling.

7. The system as recited in claim 1, wherein the measurement circuit includes a control circuit, which conveys measurement information.

8. The system as recited in claim 1, wherein the test device includes a probe ring.

9. The system as recited in claim 1, wherein the at least one characteristic includes at least one of a layer thickness and a circuit parameter or response.

10. The system as recited in claim 1, wherein the thin film dielectric membrane is transparent so that the source mounted Thereon can be visually aligned to the power transfer component.