Programmable gain instrumentation amplifier with improved gain multiplexers
First Claim
1. A programmable gain amplifier (PGA) comprising:
- a first operational amplifier (op-amp);
a plurality of gain-setting resistors, each gain-setting resistor having two ends;
a first double-multiplexer having a first common terminal and a second common terminal, wherein the first double-multiplexer is operable to couple, through its first common terminal, one end of any selected one of the plurality of gain-setting resistors to a first input of the first op-amp, and wherein the first double-multiplexer is configured to receive a first one or more power supply signals; and
a first bootstrap circuit operable to provide the first one or more power supply signals to the first double-multiplexer, wherein the first one or more power supply signals track a respective signal appearing on the first input of the first op-amp.
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Accused Products
Abstract
In one embodiment, a programmable gain instrumentation amplifier comprises an input stage configured with a differential precision current conveyor circuit. The current conveyor circuit may be implemented with operational amplifiers coupled to gain-setting resistors, with double-multiplexers configured on each end of the gain-setting resistors. In a first set of embodiments, the double-multiplexers may be bootstrapped, whereby the power supplies of each double-multiplexer may track the signals on the output pin of a respective sense-multiplexer component of the double-multiplexer. In a second set of embodiments, the power supplies may alternatively track the op-amp differential output during non-overload conditions, or the op-amp common-mode output at a gain resistor center tap during overload conditions. Corresponding bootstrap circuits may be designed for both sets of embodiments, the bootstrap circuits coupling to the respective tracking node or nodes in either case.
32 Citations
20 Claims
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1. A programmable gain amplifier (PGA) comprising:
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a first operational amplifier (op-amp); a plurality of gain-setting resistors, each gain-setting resistor having two ends; a first double-multiplexer having a first common terminal and a second common terminal, wherein the first double-multiplexer is operable to couple, through its first common terminal, one end of any selected one of the plurality of gain-setting resistors to a first input of the first op-amp, and wherein the first double-multiplexer is configured to receive a first one or more power supply signals; and a first bootstrap circuit operable to provide the first one or more power supply signals to the first double-multiplexer, wherein the first one or more power supply signals track a respective signal appearing on the first input of the first op-amp. - View Dependent Claims (2, 3, 4, 5, 6, 7, 8)
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9. A programmable gain amplifier (PGA) comprising:
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a first current conveyor; a plurality of gain-setting resistors, each gain-setting resistor having two ends; a first multiplexer having a common terminal, wherein the first multiplexer is operable to couple, through its common terminal, one end of any selected one of the plurality of gain-setting resistors to a sense node of the first current conveyor, and wherein the first multiplexer is configured to receive a first one or more power supply signals; and a first bootstrap circuit operable to provide the first one or more power supply signals to the first multiplexer, wherein the first one or more power supply signals track a respective signal appearing on an input of the first current conveyor. - View Dependent Claims (10, 11, 12)
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13. A programmable gain amplifier (PGA) comprising:
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a first op-amp and a second op-amp; a first plurality of gain-setting resistors and a second plurality of gain-setting resistors, each gain-setting resistor having two ends, wherein a first end of each one of the first plurality of gain-setting resistors and a first end of each one of the second plurality of gain-setting resistors is configured to couple to a common-mode voltage node; a first double-multiplexer having a first common terminal and a second common terminal, wherein the first double-multiplexer is operable to couple, through its first common terminal, the second end of any selected one of the first plurality of gain-setting resistors to a first input of the first op-amp, and wherein the first double-multiplexer is configured to receive a first one or more power supply signals; and a first bootstrap circuit operable to provide the first one or more power supply signals to the first double-multiplexer, wherein the first one or more power supply signals are operable to; during non-overload conditions, track a respective signal appearing at an output of the first op-amp; and during overload conditions, track a respective signal appearing at the common-mode voltage node. - View Dependent Claims (14, 15, 16, 17, 18, 19, 20)
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Specification