Stacked RF power amplifier

• US 7,215,206 B2
• Filed: 03/10/2006
• Issued: 05/08/2007
• Est. Priority Date: 09/25/2003
• Status: Active Grant

• Current Assignee: Qualcomm, Inc.
• Original Assignee: Silicon Laboratories Incorporated
• Inventors: Paul, Susanne A., Dupuis, Timothy J.
• Primary Examiner(s): Choe; Henry
• Application Number:
  US11/373,051
• Publication Number:
  US 20060226905A1
• Time in Patent Office: 424 Days
• Field of Search: 330/98, 330/150, 330/251, 330/307, 330/310, 330/311, 257/500, 257/509, 257/548, 257/351
• US Class Current: 330/311
• CPC Class Codes: H03F 1/52 Circuit arrangements for protecting such amplifiers monitoring arrangements G01R31/28; increasing reliability in communication systems, e.g. using redundancy H04B1/74
• CPC Class Codes: H03F 1/523 for amplifiers using field-effect devices H03F1/526 takes precedence
• CPC Class Codes: H03F 3/189 High-frequency amplifiers, e.g. radio frequency amplifiers
• CPC Class Codes: H03F 3/193 with field-effect devices H03F3/195 takes precedence
• CPC Class Codes: H03F 3/211 using a combination of several amplifiers H03F3/60 takes precedence
• CPC Class Codes: H03F 3/24 of transmitter output stages
• CPC Class Codes: H03F 3/423 with MOSFET's

Abstract

A method and apparatus provides techniques for electrically isolating switching devices in a stacked RF power amplifier, which prevents the switching devices from being subjected to high breakdown voltages. The isolation provided allows the power amplifier to be implemented on an integrated circuit.

Claims

1. A new method of providing an RF power amplifier comprising:

providing a integrated circuit;

forming an RF power amplifier using first and second power amplifiers configured in a stacked arrangement between a voltage supply and ground, wherein the first and second stacked power amplifiers each include at least one switching device; and

electrically isolating a switching device of the first power amplifier from a switching device of the second power amplifier.

2. The method of claim 1, wherein the step of electrically isolating a switching device of the first power amplifier with a switching device of the second power amplifier further comprising isolating a body of the first switching device from a body of the second switching device.

3. The method of claim 2, further comprising forming a deep N-well on the integrated circuit.

4. The method of claim 3, wherein the switching device of the second power amplifier is formed using the deep N-well to provide isolation from the switching device of the first power amplifier.

5. The method of claim 4, further comprising applying a bias voltage to the deep N-well.

6. The method of claim 2 further comprising using silicon on isolator techniques for isolating the body of the first switching device from the body of the second switching device.

7. The method of claim 2 further comprising forming a deep N-well on the integrated circuit for isolating the switching device of the first power amplifier from the switching device of the second power amplifier.

8. The method claim 1 wherein the integrated circuit is implemented using CMOS technology.

9. An RF power amplifier formed on an integrated circuit comprising:

a first power amplifier formed on the integrated circuit;

a second power amplifier formed on the integrated circuit; and

a deep N-well formed on the integrated circuit, wherein the deep N-well provides isolation between the first power amplifier and the second power amplifier.

10. The RF power amplifier of claim 9 wherein a bias voltage is applied to the deep N-well.

11. The RF power amplifier of claim 9 wherein the first power amplifier has a first switching device, wherein the second power amplifier has a second switching device, and wherein the second switching device is at least partially formed in the deep N-well.

12. The RF power amplifier of claim 9 wherein the first and second power amplifiers are arranged in a stacked arrangement.

13. The RF power amplifier of claim 9 wherein the integrated circuit is implemented using CMOS technology.

14. A stacked RF power amplifier comprising:

an integrated circuit;

first and second power amplifiers formed on the integrated circuit, wherein the first and second power amplifiers are coupled together between a voltage differential, and wherein the first and second power amplifiers each include at least one switching device; and

wherein a first switching device in the first power amplifier is electrically isolated from a second switching device in the second power amplifier.

15. The stacked RF power amplifier of claim 14 wherein the first switching device in the first power amplifier is electrically isolated from the second switching device in the second power amplifier by forming one of the switching devices in a deep N-well.

16. The stacked RF power amplifier of claim 15, wherein a bias voltage is applied to the deep N-well.

17. The stacked RF power amplifier of claim 14, wherein the first switching device in the first power amplifier is electrically isolated from the second switching device in the second power amplifier by forming the integrated circuit using N⁻

starting material and forming the first and second switching devices in P-wells.

18. The stacked RF power amplifier of claim 14, wherein the first switching device in the first power amplifier is electrically isolated from the second switching device in the second power amplifier by using a silicon on isolator technique.

19. The stacked RF power amplifier of claim 14 wherein the integrated circuit is implemented using CMOS technology.

20. The stacked RF power amplifier of claim 14, wherein the first and second power amplifiers are configured in a stacked arrangement.