Iterative metric updating when decoding LDPC (low density parity check) coded signals and LDPC coded modulation signals

• US 7,216,283 B2
• Filed: 09/23/2003
• Issued: 05/08/2007
• Est. Priority Date: 06/13/2003
• Status: Expired due to Fees

• Current Assignee: Avago Technologies International Sales Pte Limited (Broadcom, Inc.)
• Original Assignee: Broadcom Corporation (Broadcom, Inc.)
• Inventors: Shen, Ba-Zhong, Tran, Hau Thien, Cameron, Kelly Brian
• Primary Examiner(s): DILDINE JR, R STEPHEN
• Application Number:
  US10/669,177
• Publication Number:
  US 20040255229A1
• Time in Patent Office: 1,323 Days
• Field of Search: 714/752, 714/791, 714/794
• US Class Current: 714/752
• CPC Class Codes: H03M 13/1102 Codes on graphs and decoding on graphs, e.g. low-density parity check [LDPC] codes
• CPC Class Codes: H03M 13/1105 Decoding
• CPC Class Codes: H03M 13/1117 using approximations for check node processing, e.g. an outgoing message is depending on the signs and the minimum over the magnitudes of all incoming messages according to the min-sum rule
• CPC Class Codes: H03M 13/25 Error detection or forward error correction by signal space coding, i.e. adding redundancy in the signal constellation, e.g. Trellis Coded Modulation [TCM] modulation codes H03M13/31
• CPC Class Codes: H03M 13/255 with Low Density Parity Check [LDPC] codes
• CPC Class Codes: H03M 13/256 with trellis coding, e.g. with convolutional codes and TCM
• CPC Class Codes: H03M 13/258 with turbo codes, e.g. Turbo Trellis Coded Modulation [TTCM]
• CPC Class Codes: H03M 13/2957 Turbo codes and decoding
• CPC Class Codes: H03M 13/4161 implementing path management
• CPC Class Codes: H03M 13/45 Soft decoding, i.e. using symbol reliability information H03M13/41 takes precedence
• CPC Class Codes: H04L 1/0041 Arrangements at the transmitter end
• CPC Class Codes: H04L 1/005 Iterative decoding, including iteration between signal detection and decoding operation
• CPC Class Codes: H04L 1/0058 Block-coded modulation
• CPC Class Codes: H04L 1/006 Trellis-coded modulation
• CPC Class Codes: H04L 27/18 Phase-modulated carrier systems, i.e. using phase-shift keying H04L27/32 takes precedence
• CPC Class Codes: H04L 27/2602 Signal structure

Abstract

Iterative metric updating when decoding LDPC (Low Density Parity Check) coded signals and LDPC coded modulation signals. A novel approach is presented for updating the bit metrics employed when performing iterative decoding of LDPC coded signals. This bit metric updating is also applicable to decoding of signals that have been generated using combined LDPC coding and modulation encoding to generate LDPC coded modulation signals. In addition, the bit metric updating is also extendible to decoding of LDPC variable code rate and/or variable modulation signals whose code rate and/or modulation may vary as frequently as on a symbol by symbol basis. By ensuring that the bit metrics are updated during the various iterations of the iterative decoding processing, a higher performance can be achieved than when the bit metrics remain as fixed values during the iterative decoding processing.

Claims

1. A decoding method that performs updating of a bit metric when decoding an LDPC (Low Density Parity Check) coded signal, the method comprising:

receiving a symbol block of the LDPC coded signal wherein the symbol block includes a plurality of symbols;

mapping a symbol of the plurality of symbols according to a code rate and modulation that corresponds to the symbol wherein the modulation includes a constellation and a mapping;

making initial estimates of I,Q (In-phase, Quadrature) values of the symbol at a plurality of symbol nodes that are connected to a plurality of bit nodes within an LDPC bipartite graph that includes a plurality of edges that connect a plurality of bit nodes to a plurality of check nodes;

computing a plurality of m-bit symbol metrics that correspond to the symbol wherein the symbol has m-bits;

with respect to the plurality of symbol nodes, calculating a plurality of bit metrics that corresponds to the m-bits of the symbol using the plurality of m-bit symbol metrics;

passing the plurality of bit metrics from the plurality of symbol nodes to the plurality of bit nodes connected thereto;

performing iterative decoding processing that includes;

with respect to the plurality of bit nodes;

updating edge messages received from the plurality of check nodes with the plurality of bit metrics;

simultaneously updating soft bit information corresponding to the m-bits of the symbol using the updated edge messages and passing the updated edge messages from the plurality of bit nodes to the plurality of check nodes;

with respect to the plurality of symbol nodes;

updating the plurality of bit metrics with the soft bit information sent from the plurality of bit nodes;

passing the updated plurality of bit metrics from the plurality of symbol nodes to the plurality of bit nodes;

with respect to the plurality of check nodes;

updating the edge information sent from the plurality of bit nodes to the plurality of check nodes;

passing the updated edge messages from the plurality of check nodes to the plurality of bit nodes; and

making hard decisions of the m-bits of the symbol using the latest updated soft bit information corresponding to the m-bits of the symbol.

2. The method of claim 1, wherein:

the LDPC coded signal is an LDPC variable modulation signal that includes a first LDPC coded modulation symbol and a second LDPC coded modulation symbol;

the first LDPC coded modulation symbol is modulation encoded according to a first modulation that includes a first constellation and a corresponding first mapping; and

the second LDPC coded modulation symbol is modulation encoded according to a second modulation that includes a second constellation and a corresponding second mapping.

3. The method of claim 2, wherein:

the first constellation is an 8 PSK (8 Phase Shift Key) shaped constellation;

the second constellation is the 8 PSK shaped constellation;

the first modulation includes the 8 PSK shaped constellation whose constellation points are mapped according to the corresponding first mapping; and

the second modulation includes the 8 PSK shaped constellation whose constellation points are mapped according to the corresponding second mapping.

4. The method of claim 1, wherein:

the LDPC coded signal is an LDPC variable code rate signal that includes a first LDPC coded symbol and a second LDPC coded symbol;

the first LDPC coded symbol is LDPC encoded according to a first code rate; and

the second LDPC coded symbol is LDPC encoded according to a second code rate.

5. The method of claim 1, wherein:

the method is performed within a decoder;

the decoder is implemented within a communication device; and

the communication device is implemented within at least one of a satellite communication system, an HDTV (High Definition Television) communication system, a cellular communication system, a microwave communication system, a point-to-point communication system, a uni-directional communication system, a bi-directional communication system, a one to many communication system, a fiber-optic communication system, a WLAN (Wireless Local Area Network) communication system, and a DSL (Digital Subscriber Line) communication system.

6. A decoding method that performs updating of a bit metric when decoding an LDPC (Low Density Parity Check) coded signal, the method comprising:

inputting I,Q (In-phase, Quadrature) values for a symbol of the LDPC coded signal;

initializing probabilities of bits of the symbol of the LDPC coded signal;

computing a first estimate of the bit metrics corresponding to the bits of the symbol of the LDPC coded signal;

computing a first estimate of edge information with the computed first estimate of the bit metrics wherein the edge information corresponds to a plurality of edges that communicatively couple a plurality of bit nodes to a plurality of check nodes within an LDPC bipartite graph that corresponds to an LDPC code;

updating check node information that corresponds to the plurality of check nodes using the first estimate of edge information;

updating the first estimate of edge information, using the updated check node information, thereby generating a second estimate of edge information;

updating bit node information that corresponds to the plurality of bit nodes using the second estimate of edge information;

updating the second estimate of edge information, using the updated bit node information, thereby generating a third estimate of edge information;

calculating a first soft estimate of the bits of the symbol of the LDPC coded signal using the first estimate of the bit metrics and the third estimate of edge information;

updating the third estimate of edge information using the first soft estimate of the bits of the symbol of the LDPC coded signal;

calculating probabilities of bits of the symbol of the LDPC coded signal using the first soft estimate of the bits of the symbol of the LDPC coded signal;

computing a second estimate of the bit metrics corresponding to the bits of the symbol of the LDPC coded signal using the probabilities of bits of the symbol of the LDPC coded signal;

calculating a second soft estimate of the bits of the symbol of the LDPC coded signal using the second estimate of the bit metrics; and

making hard decisions of the bits of the symbol of the LDPC coded signal using the second soft estimate of the bits of the symbol of the LDPC coded signal.

7. The method of claim 6, wherein:

the LDPC coded signal is an LDPC variable modulation signal that includes a first LDPC coded modulation symbol and a second LDPC coded modulation symbol;

the first LDPC coded modulation symbol is modulation encoded according to a first modulation that includes a first constellation and a corresponding first mapping; and

the second LDPC coded modulation symbol is modulation encoded according to a second modulation that includes a second constellation and a corresponding second mapping.

8. The method of claim 7, wherein:

the first constellation is an 8 PSK (8 Phase Shift Key) shaped constellation;

the second constellation is the 8 PSK shaped constellation;

the first modulation includes the 8 PSK shaped constellation whose constellation points are mapped according to the corresponding first mapping; and

the second modulation includes the 8 PSK shaped constellation whose constellation points are mapped according to the corresponding second mapping.

9. The method of claim 6, wherein:

the LDPC coded signal is an LDPC variable code rate signal that includes a first LDPC coded symbol and a second LDPC coded symbol;

the first LDPC coded symbol is LDPC encoded according to a first code rate; and

the second LDPC coded symbol is LDPC encoded according to a second code rate.

10. The method of claim 6, wherein:

the method is performed within a decoder;

the decoder is implemented within a communication device; and

the communication device is implemented within at least one of a satellite communication system, an HDTV (High Definition Television) communication system, a cellular communication system, a microwave communication system, a point-to-point communication system, a uni-directional communication system, a bi-directional communication system, a one to many communication system, a fiber-optic communication system, a WLAN (Wireless Local Area Network) communication system, and a DSL (Digital Subscriber Line) communication system.

11. A decoder that performs updating of a bit metric when decoding an LDPC (Low Density Parity Check) coded signal, the decoder comprising:

an m-bit symbol metric computer functional block that calculates a plurality of m-bit symbol metrics that correspond to a symbol of the LDPC coded signal wherein the symbol has m-bits;

a symbol node calculator functional block that calculates a plurality of bit metrics using the plurality of m-bit symbol metrics;

a bit node calculator functional block that computes soft messages corresponding to the m-bits of the symbol using the plurality of bit metrics;

a check node operator functional block that provides a plurality of edge messages to the bit node calculator functional block;

wherein the plurality of edge messages corresponds to a plurality of edges that communicatively couple a plurality of bit nodes to a plurality of check nodes within an LDPC bipartite graph that corresponds to an LDPC code by which the LDPC coded signal is generated;

wherein the bit node calculator functional block updates the plurality of edge messages provided from the check node operator functional block using the plurality of bit metrics calculated by the symbol node calculator functional block;

wherein the bit node calculator functional block provides the updated plurality of edge messages to the check node operator functional block while the bit node calculator functional block updates the soft messages corresponding to the m-bits of the symbol using the updated plurality of edge messages;

wherein the symbol node calculator functional block updates the plurality of bit metrics using the updated soft messages corresponding to the m-bits of the symbol; and

wherein the bit node calculator functional block and the check node operator functional block operate cooperatively to perform iterative decoding, by employing updated versions of the plurality of bit metrics, and output best estimates of the m-bits of the symbol of the LDPC coded signal using latest updated soft messages corresponding to the m-bits of the symbol of the LDPC coded signal.

12. The decoder of claim 11, wherein:

the LDPC coded signal is an LDPC variable modulation signal that includes a first LDPC coded modulation symbol and a second LDPC coded modulation symbol;

the first LDPC coded modulation symbol is modulation encoded according to a first modulation that includes a first constellation and a corresponding first mapping; and

the second LDPC coded modulation symbol is modulation encoded according to a second modulation that includes a second constellation and a corresponding second mapping.

13. The decoder of claim 11, wherein:

the first constellation is an 8 PSK (8 Phase Shift Key) shaped constellation;

the second constellation is the 8 PSK shaped constellation;

the first modulation includes the 8 PSK shaped constellation whose constellation points are mapped according to the corresponding first mapping; and

the second modulation includes the 8 PSK shaped constellation whose constellation points are mapped according to the corresponding second mapping.

14. The decoder of claim 11, wherein:

the LDPC coded signal is an LDPC variable code rate signal that includes a first LDPC coded symbol and a second LDPC coded symbol;

the first LDPC coded symbol is LDPC encoded according to a first code rate; and

the second LDPC coded symbol is LDPC encoded according to a second code rate.

15. The decoder of claim 11, wherein:

the decoder is implemented within a communication device; and

the communication device is implemented within at least one of a satellite communication system, an HDTV (High Definition Television) communication system, a cellular communication system, a microwave communication system, a point-to-point communication system, a uni-directional communication system, a bi-directional communication system, a one to many communication system, a fiber-optic communication system, a WLAN (Wireless Local Area Network) communication system, and a DSL (Digital Subscriber Line) communication system.

16. A decoder that performs updating of a bit metric when decoding an LDPC (Low Density Parity Check) coded signal, the decoder comprising:

a symbol node calculator functional block that calculates a plurality of bit metrics using a plurality of m-bit symbol metrics that correspond to a symbol of the LDPC coded signal wherein the symbol has m-bits;

a bit node calculator functional block that computes soft messages corresponding to the m-bits of the symbol using the plurality of bit metrics;

a check node operator functional block that provides a plurality of edge messages to the bit node calculator functional block;

wherein the plurality of edge messages corresponds to a plurality of edges that communicatively couple a plurality of bit nodes to a plurality of check nodes within an LDPC bipartite graph that corresponds to an LDPC code by which the LDPC coded signal is generated;

wherein the bit node calculator functional block updates the plurality of edge messages provided from the check node operator functional block using the plurality of bit metrics calculated by the symbol node calculator functional block;

wherein the bit node calculator functional block provides the updated plurality of edge messages to the check node operator functional block while the bit node calculator functional block updates the soft messages corresponding to the m-bits of the symbol using the updated plurality of edge messages;

wherein the symbol node calculator functional block updates the plurality of bit metrics using the updated soft messages corresponding to the m-bits of the symbol; and

wherein the bit node calculator functional block and the check node operator functional block operate cooperatively to perform iterative decoding, by employing updated versions of the plurality of bit metrics, and output best estimates of the m-bits of the symbol of the LDPC coded signal using latest updated soft messages corresponding to the m-bits of the symbol of the LDPC coded signal.

17. The decoder of claim 16, further comprising:

a m-bit symbol metric computer functional block that calculates the plurality of m-bit symbol metrics that correspond to the symbol of the LDPC coded signal.

18. The decoder of claim 16, wherein:

the LDPC coded signal is an LDPC variable modulation signal that includes a first LDPC coded modulation symbol and a second LDPC coded modulation symbol;

the first LDPC coded modulation symbol is modulation encoded according to a first modulation that includes a first constellation and a corresponding first mapping; and

the second LDPC coded modulation symbol is modulation encoded according to a second modulation that includes a second constellation and a corresponding second mapping.

19. The decoder of claim 16, wherein:

the first constellation is an 8 PSK (8 Phase Shift Key) shaped constellation;

the second constellation is the 8 PSK shaped constellation;

the first modulation includes the 8 PSK shaped constellation whose constellation points are mapped according to the corresponding first mapping; and

the second modulation includes the 8 PSK shaped constellation whose constellation points are mapped according to the corresponding second mapping.

20. The decoder of claim 16, wherein:

the LDPC coded signal is an LDPC variable code rate signal that includes a first LDPC coded symbol and a second LDPC coded symbol;

the first LDPC coded symbol is LDPC encoded according to a first code rate; and

the second LDPC coded symbol is LDPC encoded according to a second code rate.

21. The decoder of claim 16, wherein:

the decoder is implemented within a communication device; and

the communication device is implemented within at least one of a satellite communication system, an HDTV (High Definition Television) communication system, a cellular communication system, a microwave communication system, a point-to-point communication system, a uni-directional communication system, a bi-directional communication system, a one to many communication system, a fiber-optic communication system, a WLAN (Wireless Local Area Network) communication system, and a DSL (Digital Subscriber Line) communication system.

22. A decoder that performs updating of a bit metric when decoding an LDPC (Low Density Parity Check) coded signal, the decoder comprising:

a symbol node calculator functional block that calculates a plurality of bit metrics using a plurality of m-bit symbol metrics that corresponds to a symbol of the LDPC coded signal wherein the symbol has m-bits;

a bit node calculator functional block that computes soft messages corresponding to the m-bits of the symbol using the plurality of bit metrics;

a check node operator functional block that provides a plurality of edge messages to the bit node calculator functional block;

wherein the plurality of edge messages corresponds to a plurality of edges that communicatively couple a plurality of bit nodes to a plurality of check nodes within an LDPC bipartite graph that corresponds to an LDPC code by which the LDPC coded signal is generated;

wherein the bit node calculator functional block updates the plurality of edge messages provided from the check node operator functional block using the plurality of bit metrics calculated by the symbol node calculator functional block;

wherein the bit node calculator functional block provides the updated plurality of edge messages to the check node operator functional block while the bit node calculator functional block updates the soft messages corresponding to the m-bits of the symbol using the updated plurality of edge messages;

wherein the symbol node calculator functional block updates the plurality of bit metrics using the updated soft messages corresponding to the m-bits of the symbol;

wherein the bit node calculator functional block and the check node operator functional block operate cooperatively to perform iterative decoding, by employing updated versions of the plurality of bit metrics, and output best estimates of the m-bits of the symbol of the LDPC coded signal using latest updated soft messages corresponding to the m-bits of the symbol of the LDPC coded signal;

wherein the LDPC coded signal is an LDPC variable modulation signal that includes a first LDPC coded modulation symbol and a second LDPC coded modulation symbol;

wherein the first LDPC coded modulation symbol is modulation encoded according to a first modulation that includes a first constellation and a corresponding first mapping; and

wherein the second LDPC coded modulation symbol is modulation encoded according to a second modulation that includes a second constellation and a corresponding second mapping.

23. The decoder of claim 22, further comprising:

an m-bit symbol metric computer functional block that calculates the plurality of m-bit symbol metrics that correspond to the symbol of the LDPC coded signal.

24. The decoder of claim 22, wherein:

the first constellation is an 8 PSK(8 Phase Shift Key) shaped constellation;

the second constellation is the 8 PSK shaped constellation;

the first modulation includes the 8 PSK shaped constellation whose constellation points are mapped according to the corresponding first mapping; and

the second modulation includes the 8 PSK shaped constellation whose constellation points are mapped according to the corresponding second mapping.

25. The decoder of claim 22, wherein:

the LDPC coded signal is also an LDPC variable code rate signal;

the first LDPC coded modulation symbol is LDPC encoded according to a first code rate; and

the second LDPC coded modulation symbol is LDPC encoded according to a second code rate.

26. The decoder of claim 22, wherein:

the decoder is implemented within a communication device; and

the communication device is implemented within at least one of a satellite communication system, an HDTV (High Definition Television) communication system, a cellular communication system, a microwave communication system, a point-to-point communication system, a uni-directional communication system, a bi-directional communication system, a one to many communication system, a fiber-optic communication system, a WLAN (Wireless Local Area Network) communication system, and a DSL (Digital Subscriber Line) communication system.

27. A decoder that performs updating of a bit metric when decoding an LDPC (Low Density Parity Check) coded signal, the decoder comprising:

a symbol node calculator functional block that calculates a plurality of bit metrics using a plurality of m-bit symbol metrics that correspond to a symbol of the LDPC coded signal wherein the symbol has m-bits;

a bit node calculator functional block that computes soft messages corresponding to the m-bits of the symbol using the plurality of bit metrics;

a check node operator functional block that provides a plurality of edge messages to the bit node calculator functional block;

wherein the plurality of edge messages corresponds to a plurality of edges that communicatively couple a plurality of bit nodes to a plurality of check nodes within an LDPC bipartite graph that corresponds to an LDPC code by which the LDPC coded signal is generated;

wherein the bit node calculator functional block updates the plurality of edge messages provided from the check node operator functional block using the plurality of bit metrics calculated by the symbol node calculator functional block;

wherein the bit node calculator functional block provides the updated plurality of edge messages to the check node operator functional block while the bit node calculator functional block updates the soft messages corresponding to the m-bits of the symbol using the updated plurality of edge messages;

wherein the symbol node calculator functional block updates the plurality of bit metrics using the updated soft messages corresponding to the m-bits of the symbol;

wherein the bit node calculator functional block and the check node operator functional block operate cooperatively to perform iterative decoding, by employing updated versions of the plurality of bit metrics, and output best estimates of the m-bits of the symbol of the LDPC coded signal using latest updated soft messages corresponding to the m-bits of the symbol of the LDPC coded signal;

wherein the LDPC coded signal is an LDPC variable code rate signal that includes a first LDPC coded symbol and a second LDPC coded symbol;

wherein the first LDPC coded symbol is LDPC encoded according to a first code rate; and

wherein the second LDPC coded symbol is LDPC encoded according to a second code rate.

28. The decoder of claim 27, further comprising:

an m-bit symbol metric computer functional block that calculates the plurality of m-bit symbol metrics that correspond to the symbol of the LDPC coded signal.

29. The decoder of claim 27, wherein:

the LDPC coded signal is also an LDPC variable modulation signal;

the first LDPC coded symbol is a first LDPC coded modulation symbol;

the second LDPC coded symbol is a second LDPC coded modulation symbol;

the first LDPC coded modulation symbol is modulation encoded according to a first modulation that includes a first constellation and a corresponding first mapping; and

the second LDPC coded modulation symbol is modulation encoded according to a second modulation that includes a second constellation and a corresponding second mapping.

30. The decoder of claim 29, wherein:

the first constellation is an 8 PSK (8 Phase Shift Key) shaped constellation;

the second constellation is the 8 PSK shaped constellation;

the first modulation includes the 8 PSK shaped constellation whose constellation points are mapped according to the corresponding first mapping; and

the second modulation includes the 8 PSK shaped constellation whose constellation points are mapped according to the corresponding second mapping.

31. The decoder of claim 27, wherein:

the decoder is implemented within a communication device; and

the communication device is implemented within at least one of a satellite communication system, an HDTV (High Definition Television) communication system, a cellular communication system, a microwave communication system, a point-to-point communication system, a uni-directional communication system, a bi-directional communication system, a one to many communication system, a fiber-optic communication system, a WLAN (Wireless Local Area Network) communication system, and a DSL (Digital Subscriber Line) communication system.