Apparatus, system, and method for up-converting electromagnetic signals

• US 7,218,899 B2
• Filed: 10/12/2004
• Issued: 05/15/2007
• Est. Priority Date: 04/14/2000
• Status: Expired due to Fees

• Current Assignee: ParkerVision, Inc.
• Original Assignee: ParkerVision, Inc.
• Inventors: Cook, Robert W., Rawlins, Gregory S., Bultman, Michael J., Sorrells, David F., Moses, Charley D. Jr., Looke, Richard C., Rawlins, Michael W.
• Primary Examiner(s): LE, LANA N
• Application Number:
  US10/961,253
• Publication Number:
  US 20060019617A1
• Time in Patent Office: 945 Days
• Field of Search: 455 91-129, 375/259
• US Class Current: 455/127.1
• CPC Class Codes: H03D 7/00 Transference of modulation from one carrier to another, e.g. frequency-changing H03D9/00, H03D11/00 take precedence; dielectric amplifiers, magnetic amplifiers, parametric amplifiers used as a frequency-changers H03F
• CPC Class Codes: H04B 1/16 Circuits

Abstract

Methods, systems, and apparatuses for down-converting and up-converting an electromagnetic signal. In embodiments, the invention operates by receiving an electromagnetic signal and recursively operating on approximate half cycles of a carrier signal. The recursive operations can be performed at a sub-harmonic rate of the carrier signal. The invention accumulates the results of the recursive operations and uses the accumulated results to form a down-converted signal. In embodiments, up-conversion is accomplished by controlling a switch with an oscillating signal, the frequency of the oscillating signal being selected as a sub-harmonic of the desired output frequency. When the invention is being used in the frequency modulation or phase modulation implementations, the oscillating signal is modulated by an information signal before it causes the switch to gate a bias signal. The output of the switch is filtered, and the desired harmonic is output.

Claims

1. An apparatus for up-converting an electromagnetic signal, comprising:

a first and second amplifier each having a first, second and third port;

a switching device having a first, second and third port;

a first and second capacitor each having a first and second port; and

a first and second impedance device each having a first and second port, wherein

the second port of the first and second amplifier are electrically coupled together,

the third port of the first amplifier is electrically coupled to the first port of the first impedance device,

the third port of the second amplifier is electrically coupled to the first port of the second impedance device,

the first port of the switching device, the second port of the first impedance device and the first port of the first capacitor are electrically coupled together, and

the second port of the switching device, the second port of the second impedance device and the first port of the second capacitor are electrically coupled together, and wherein

a switching signal is applied to the third port of the switching device.

2. The apparatus of claim 1, further comprising:

a third capacitor having a first and second port, wherein the first port of the third capacitor is electrically coupled to the third port of the first amplifiers and the second port of the third capacitor is electrically coupled to a first bias; and

a fourth capacitor having a first and second port, wherein the first port of the fourth capacitor is electrically coupled to the third port of the second amplifier, and the second port of the fourth capacitor is electrically coupled to a second bias.

3. The apparatus of claim 2, wherein the first and second bias is an AC ground.

4. The apparatus of claim 1, wherein the switching device is a transistor.

5. The apparatus of claim 1, wherein the switching device is a FET.

6. The apparatus of claim 1, wherein the switching device is a JFET.

7. The apparatus of claim 1, wherein the switching device is a MOSFET.

8. The apparatus of claim 1, wherein an input information signal is applied to the first port of the first amplifier, and wherein an inverted version of the input information signal is applied to the first port of the second amplifier.

9. The apparatus of claim 8, wherein the second port of the first capacitor is electrically coupled to a first node, and the second port of the second capacitor is electrically coupled to a second node, wherein an output signal is produced differentially between the first node and second node.

10. The apparatus of claim 9, wherein the output signal is a harmonically rich signal.

11. The apparatus of claim 10, further comprising a band pass filter that filters said output signal and outputs a signal that includes a selected frequency for transmission.

12. A method for up-converting an information signal, comprising:

amplifying a non-inverted information signal;

amplifying an inverted information signal;

electrically coupling the amplified non-inverted information signal to a first port of a first capacitor through a first impedance, wherein the first capacitor and first impedance are electrically coupled at a first node;

electrically coupling the amplified inverted information signal to a first port of a second capacitor through a second impedance, wherein the second capacitor and second impedance are electrically coupled at a second node; and

gating a switching device coupled between the first node and the second node according to a control signal; and

wherein an up-converted signal is produced differentially between a second port of the first capacitor and a second port of the second capacitor.

13. The method of claim 12, further comprising:

receiving the control signal having a train of pulses.

14. The method of claim 12, further comprising:

generating the control signal.

15. The method of claim 12, wherein the up-converted signal is a harmonically rich signal, further comprising:

filtering the up-converted signal to remove at least one harmonic frequency, whereby the filtered up-converted signal includes at least one selected frequency.

16. The method of claim 15, further comprising:

transmitting the filtered up-converted signal.

17. The method of claim 12, wherein the first and second impedances are alternating current (AC) filters.

18. The method of claim 12, further comprising:

storing energy from the amplified non-inverted information signal in a first energy storage device; and

storing energy from the amplified inverted information signal in a second energy storage device.

19. The method of claim 12, wherein said gating step comprises shorting the first node to the second node when the switching device is closed.

20. The method of claim 19, wherein said shorting step comprises causing the first and second capacitors to at least partially discharge.

21. The method of claim 12, wherein said gating step comprises enabling energy to transfer from the amplified non-inverted information signal to the first capacitor and energy to transfer from the amplified inverted information signal to the second capacitor when the switching device is open.

22. A transmitter, comprising:

a first amplifier that receives a non-inverted information signal and outputs an amplified non-inverted information signal;

a second amplifier that receives an inverted information signal and outputs an amplified inverted information signal;

first and second impedances;

a first capacitor that receives the amplified non-inverted information signal at a first port through said first impedance, wherein the first capacitor and first impedance are electrically coupled at a first node;

a second capacitor that receives the amplified inverted information signal at a first port through said second impedance, wherein the second capacitor and second impedance are electrically coupled at a second node; and

a switching device coupled between the first node and the second node, wherein the switching device receives a control signal; and

wherein an up-converted signal is produced differentially between a second port of the first capacitor and a second port of the second capacitor.

23. The transmitter of claim 22, wherein the control signal causes the switching device to close to short together the first node and second node.

24. The transmitter of claim 23, wherein the control signal causes the switching device to close to at least partially discharge the first and second capacitors.

25. The transmitter of claim 22, wherein the control signal includes a train of pulses.

26. The transmitter of claim 22, wherein the control signal causes the switching device to open to enable energy to transfer from the amplified non-inverted information signal to the first capacitor and energy to transfer from the amplified inverted information signal to the second capacitor.

27. The transmitter of claim 22, further comprising:

a first capacitor electrically coupled between the amplified non-inverted information signal and a first bias; and

a second capacitor electrically coupled between the amplified inverted information signal and the second bias.

28. The transmitter of claim 22, wherein the first and second bias is an alternating current (AC) ground.

29. The transmitter of claim 22, wherein the switching device is a transistor.

30. The transmitter of claim 22, wherein the switching device is a FET.

31. The transmitter of claim 22, wherein the switching device is a JFET.

32. The transmitter of claim 22, wherein the switching device is a MOSFET.

33. The transmitter of claim 22, wherein the up-converted signal is a harmonically rich signal.

34. The transmitter of claim 33, further comprising a band pass filter that filters said up-converted signal to remove at least harmonic frequency, whereby the filtered up-converted signal includes a selected frequency.