Apparatus and method for direct memory access in a hub-based memory system

• US 7,222,197 B2
• Filed: 02/24/2005
• Issued: 05/22/2007
• Est. Priority Date: 07/22/2003
• Status: Expired due to Fees

• Current Assignee: Round Rock Research LLC
• Original Assignee: Micron Technology, Inc.
• Inventors: Jeddeloh, Joseph M.
• Primary Examiner(s): Huynh; Kim
• Assistant Examiner(s): SORRELL, ERON J
• Application Number:
  US11/065,990
• Publication Number:
  US 20050160201A1
• Time in Patent Office: 817 Days
• Field of Search: 710 22- 26, 710/308, 711 1- 5
• US Class Current: 710/22
• CPC Class Codes: G06F 13/28 using burst mode transfer, e.g. direct memory access DMA, cycle steal G06F13/32 takes precedence
• CPC Class Codes: G06F 13/4009 with data restructuring

Abstract

A memory hub for a memory module having a DMA engine for performing DMA operations in system memory. The memory hub includes a link interface for receiving memory requests for access at least one of the memory devices of the system memory, and further including a memory device interface for coupling to the memory devices, the memory device interface coupling memory requests to the memory devices for access to at least one of the memory devices. A switch for selectively coupling the link interface and the memory device interface is further included in the memory hub. Additionally, a direct memory access (DMA) engine is coupled through the switch to the memory device interface to generate memory requests for access to at least one of the memory devices to perform DMA operations.

Claims

1. A method for executing memory operations in a computer system having a processor, a system controller coupled to the processor, and a system memory having at least one memory module coupled to the system controller through a memory bus, the method comprising:

writing direct memory access (DMA) information to a location in the system memory representing instructions for executing memory operations in the system memory without processor intervention;

obtaining control of the memory bus from the processor and system controller; and

using a DMA controller located on the memory module, accessing the location in the system memory to which the DMA information is written and handling execution of the memory operations represented by the instructions by the DMA controller on the memory module until completion of the memory operations.

2. The method of claim 1, further comprising isolating the system memory during execution of the memory operations.

3. The method of claim 1 wherein writing DMA information comprises:

writing a starting memory address of a memory location in the system memory at which the memory operations begins;

writing a target address of a memory location in the system memory to which data is to be moved in the memory operations;

writing a count value indicative of the number of memory locations to be accessed in the memory operations; and

writing a next memory address value representative of the completion of the memory operations or representative of a memory address corresponding to a link list including a starting memory address, a count value and a next memory address value.

4. The method of claim 1 wherein the system memory comprises a plurality of memory modules and wherein executing the memory operations comprises accessing a memory location in a first of the plurality of memory modules to read data therefrom and accessing a memory location in a second of the plurality of memory modules to write the data.

5. A method for transferring data within a system memory included in a computer system having a processor, a system controller coupled to the processor, and a memory bus coupling the system controller to the system memory, the method comprising:

writing DMA instructions to a location in the system memory, the DMA instructions representing instructions for executing memory operations to transfer the data including memory addresses corresponding to first and second locations in the system memory;

obtaining control of the memory bus; and

without processor and system controller intervention and using a DMA controller located on a memory module of the system memory, accessing the location in the system memory at which the DMA instructions are written, reading data from the first location in the system memory and writing the data to the second location in the system memory.

6. The method of claim 5 wherein obtaining control of the memory bus comprises isolating the system memory from the processor and system controller while transferring data within the system memory.

7. The method of claim 5 wherein writing DMA instructions comprises:

writing a starting memory address of a memory location in the system memory at which the transfer of data begins;

writing a target address of a memory location in the system memory to which the data is to be transferred;

writing a count value indicative of the number of memory locations to be accessed in transferring the data; and

writing a next memory address value representative of the completion of the data transfer or representative of a memory address corresponding to a link list including a starting memory address, a count value and a next memory address value.

8. The method of claim 5 wherein the system memory comprises a plurality of memory modules and wherein reading data from the first location in the system memory comprises accessing a memory location in a first of the plurality of memory modules to read data therefrom and writing the data to the second location in the system memory comprises accessing a memory location in a second of the plurality of memory modules to write the data.