Logic components comprising organic field effect transistors

• US 7,223,995 B2
• Filed: 03/14/2003
• Issued: 05/29/2007
• Est. Priority Date: 03/21/2002
• Status: Expired due to Fees

• Current Assignee: PolyIC GmbH & Co. KG (Leonhard KURZ Stiftung & Company KG)
• Original Assignee: PolyIC GmbH & Co. KG (Leonhard KURZ Stiftung & Company KG)
• Inventors: Fix, Walter, Ficker, Jurgen, Ullmann, Andreas
• Primary Examiner(s): Huynh; Andy
• Assistant Examiner(s): Taylor; Earl
• Application Number:
  US10/508,640
• Publication Number:
  US 20050277240A1
• Time in Patent Office: 1,537 Days
• Field of Search: 257/40, 257/E51.007, 438/99
• US Class Current: 257/40
• CPC Class Codes: H10K 10/462 Insulated gate field-effect transistors [IGFETs]
• CPC Class Codes: H10K 19/10 comprising field-effect transistors

Abstract

The invention makes it possible, for the first time, to produce, despite conventional p-type MOS technology, fast logical gates based on organic field effect transistors. This is primarily due to the early saturation effect of OFETs having very thin semi-conducting layers, and, furthermore, to the use of OFETs having specific properties as the organic logic components and to a novel layout of the circuit containing these logic components.

Claims

1. A logic gate, comprising:

at least one first and one second interconnected organic field effect transistor (OFET) forming said logic gate, each OFET transistor including an organic semi-conductor layer, said at least one first and at least one second OFET each including a gate, of which transistors said at least one first and one second OFET are each a p-type OFET, said at least one second OFET having an organic semi-conductor layer exhibiting a thickness sufficiently thin that reduces the conductivity of this layer so that said organic semiconductor layer serves as a resistor of such an increased value in the logic gate or, wherein, the at least one second OFET semi-conductor layer is treated to reduce its conductivity to a value that is equivalent of the conductivity of said sufficiently thin organic semiconductor layer such that the reduction in conductivity of the organic semi-conductor layer of said at least one second OFET and the corresponding increase in the resistance of said organic semi-conductor layer of said at least one second OFET due to the reduced conductivity is such that said at least one second OFET without a gate potential exhibits OFF currents that are approximately one order of magnitude lower than the ON currents of the first OFET so that said at least one second OFET is switched off by an applied positive gate potential and switched on by an applied negative gate potential.

2. The logic gate as defined in claim 1, in which said first OFET semi-conductor layer has a thickness of from about 5 to about 30 nm.

3. The logic gate as defined in claim 1, wherein the organic semi-conductor layer of said first and second OFETs each have a thickness of from about 5 to about 30 nm.

4. The logic gate as defined in claim 1 which comprises at least four of said OFETs.

5. The logic gate as defined in claim 2 which comprises at least four of said OFETs.

6. The logic gate as defined in claim 3 which comprises at least four of said OFETs.

7. The logic gate as defined in any one of the previous claims having two data lines forming a respective input and an output, summing up to four data lines total, and which have different potentials.

8. The logic gate as defined in claim 1, in which said first OFET organic semi-conducting layer has a negative threshold voltage.

9. The logic gate as defined in claim 1, wherein the organic semiconducting layer of said first and second OFETs each have a negative threshold voltage.