System for direct acquisition of received signals
First Claim
1. A signal processing architecture (SPA) for acquiring a received direct sequence spread spectrum (DSSS) signal, comprising:
- means for sampling the received DSSS signal at a predetermined sampling rate;
means for cross-correlating, in a parallel fashion, time and frequency shifted versions of the sampled DSSS signal with samples of a locally generated replica of a pseudo random noise (PN) code sequence used to spread the spectrum of the received DSSS signal in order to obtain cross-correlation values;
a Doppler compensator coupled to the cross-correlating means for processing the obtained cross-correlation values in order to compensate for misalignment effects resulting from time-companding of the received DSSS signal;
an integrator for non-coherently integrating groups of the compensated cross-correlation values representing corresponding time and frequency offsets of different time segments of the received signal and replica code sequence in order to obtain correlation metrics; and
a detector for detecting whether a sum of the magnitudes of the correlation metrics exceeds a detection threshold,wherein the cross-correlating means further comprises;
a bank of code matched filters for computing short-time correlations (STCs) entirely in parallel; and
means for calculating the cross-correlation values utilizing discrete-time Fourier analysis of the computed STCs.
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Abstract
Signal processing architectures for direct acquisition of spread spectrum signals using long codes. Techniques are described for achieving a high of parallelism, employing code matched filter banks and other hardware sharing. In one embodiment, upper and lower sidebands are treated as two independent signals with identical spreading codes. Cross-correlators, in preferred embodiments, are comprised of a one or more banks of CMFs for computing parallel short-time correlations (STCs) of received signal samples and replica code sequence samples, and a means for calculating the cross-correlation values utilizing discrete-time Fourier analysis of the computed STCs. One or more intermediate quantizers may optionally be disposed between the bank of code matched filters and the cross-correlation calculation means for reducing word-sizes of the STCs prior to Fourier analysis. The techniques described may be used with BOC modulated signals or with any signal having at least two distinct sidebands.
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Citations
42 Claims
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1. A signal processing architecture (SPA) for acquiring a received direct sequence spread spectrum (DSSS) signal, comprising:
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means for sampling the received DSSS signal at a predetermined sampling rate; means for cross-correlating, in a parallel fashion, time and frequency shifted versions of the sampled DSSS signal with samples of a locally generated replica of a pseudo random noise (PN) code sequence used to spread the spectrum of the received DSSS signal in order to obtain cross-correlation values; a Doppler compensator coupled to the cross-correlating means for processing the obtained cross-correlation values in order to compensate for misalignment effects resulting from time-companding of the received DSSS signal; an integrator for non-coherently integrating groups of the compensated cross-correlation values representing corresponding time and frequency offsets of different time segments of the received signal and replica code sequence in order to obtain correlation metrics; and a detector for detecting whether a sum of the magnitudes of the correlation metrics exceeds a detection threshold, wherein the cross-correlating means further comprises; a bank of code matched filters for computing short-time correlations (STCs) entirely in parallel; and means for calculating the cross-correlation values utilizing discrete-time Fourier analysis of the computed STCs. - View Dependent Claims (2, 3, 4, 5, 6, 7, 19, 20, 21, 22, 23, 24, 25, 26)
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8. A signal processing architecture (SPA) for acquiring a received direct sequence spread spectrum (DSSS) signal, comprising:
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means for sampling the DSSS signal at a predetermined sampling rate; an interleaver for interleaving in-phase (I) and quadrature (Q) components of the sampled DSSS signal; one or more code matched filters for correlating in a pipelined fashion time and frequency shifted versions of the interleaved components with samples of a replica of a pseudo random noise (PN) code sequence used to spread the spectrum of the received DSSS signal to obtain cross-correlation outputs, wherein each code matched filter operates at twice the sampling rate and includes two data shift registers per tap for holding the interleaved components; means for calculating cross-correlation values utilizing discrete-time Fourier analysis of the cross-correlation outputs; an integrator for non-coherently integrating the cross-correlation values representing corresponding time and frequency offsets of time segments of the received signal and replica code sequence to obtain correlation metrics; and a detector for detecting whether a sum of the magnitudes of the correlation metrics exceeds a detection threshold.
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9. A signal processing architecture (SPA) for acquiring a received direct sequence spread spectrum (DSSS) signal having multiple sidebands, comprising:
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means for sampling one or more of multiple sidebands at a predetermined sampling rate; means for digitally selecting and resampling the one or more multiple sidebands; an interleaver for interleaving data of the re-sampled sidebands; one or more code matched filters for correlating in a pipelined fashion time and frequency shifted versions of the interleaved sideband data with samples of a replica of a PN code sequence used to spread the spectrum of the received DSSS signal to obtain cross-correlation outputs, the code matched filters each having additional data shift registers for holding the interleaved sideband data and each operating at a rate equal to the product of the number of selected sidebands and the predetermined sampling rate; means for calculating cross-correlation values utilizing discrete-time Fourier analysis of the cross-correlation outputs; an integrator for non-coherently integrating the cross-correlation values representing corresponding time and frequency offsets of time segments of the received signal and reference PN code sequence to obtain correlation metrics; and a detector for detecting whether a sum of the magnitudes of the correlation metrics exceeds a detection threshold.
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10. A signal processing architecture (SPA) for acquiring a received direct sequence spread spectrum (DSSS) signal having at least two sidebands, comprising:
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means for selecting a sideband of the received DSSS signal; means for down-sampling the selected sideband at a predetermined sampling rate to obtain versions of the selected sideband; an interleaver for interleaving in-phase (I) and quadrature (Q) components of the versions of the selected sideband; means for cross-correlating a locally generated sampled replica of a pseudo-random noise (PN) code sequence used to spread the spectrum of the received DSSS signal with time and frequency shifted versions of the selected sideband to obtain cross-correlation values, wherein the cross-correlating means includes at least one of (i)–
(vi);(i) means for re-sampling each selected sideband at a rate equal to an integer multiple of the nominal chip rate; (ii) a bank of code matched filters for computing short-time correlation (STCs) for the interleaved sideband components in a pipelined fashion, each code matched filter having a plurality of data shift registers per tap for holding the interleaved sideband components and operating at a rate equal to the product of twice the number of sampled sidebands and the predetermined sampling rate; (iii) a bank of code matched filters for computing short-time correlations (STCs) entirely in parallel; (iv) one or more code matched filters having a plurality of multipliers whose required number is divided by the integer multiple, wherein each code matched filter'"'"'s associated summing network has a hardware means for storing partial sums and adding partial sums from previous clock cycles in computing the cross-correlation values; (v) means for calculating the cross-correlation values utilizing discrete-time Fourier analysis of the STCs; and (vi) one or more intermediate quantizers disposed between the bank of code matched filters and the cross-correlation calculation means for reducing word-sizes of the STCs prior to Fourier analysis; a Doppler compensator coupled to the cross-correlating means for processing the obtained cross-correlation values in order to compensate for misalignment effects resulting from time-companding of the received DSSS signal, wherein the Doppler compensator includes at least one of(a)–
(d);(a) one or more integer delay line filters for coarse Doppler frequency dependent compensation; (b) one or more fractional delay line filters for fine Doppler frequency dependent compensation; (c) a table of filter coefficients for use by the fractional delay line filters in finely resolving Doppler frequency-dependent delays; and (d) externally controllable settings for applying the appropriate integer and fractional delays to each cross-correlation value; and a detector for detecting whether the magnitude of the cross-correlation values exceeds a detection threshold.
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11. A signal processing architecture (SPA) for acquiring a received multiband input signal comprising:
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means for selecting multiple sidebands from the received multiband input signal; means for down-sampling each selected sideband at a predetermined sampling rate to obtain versions of each selected sideband; an interleaver for interleaving in-phase (I) and quadrature (Q) components of the versions of each selected sideband; means for cross-correlating a replica of a pseudo random noise (PN) code sequence used to spread the spectrum of the received signal with time and frequency shifted versions of each selected sideband to obtain cross-correlation values, wherein the cross-correlating means further comprises a bank of code matched filters for computing short-time correlations (STCs) for the interleaved sideband components in a pipelined fashion, each code matched filter having a plurality of data shift registers per tap for holding the interleaved components and operating at a rate equal to the product of twice the number of sampled sidebands and the predetermined sampling rate; an integrator for non-coherently combining the cross-correlation values to obtain correlation metrics; and a detector for detecting whether the magnitudes of the correlation metrics exceed a detection threshold. - View Dependent Claims (12, 13, 14, 15, 16, 17, 18)
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27. A cross-correlation apparatus for cross-correlating a sampled reference signal with time and frequency shifted samples of a received signal that was sampled at a predetermined sampling rate, comprising:
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an interleaver for interleaving in-phase (I) and quadrature (Q) components of the sampled received signal; a bank of code matched filters for computing short-time correlations (STCs) for the interleaved components in a pipelined fashion, the code matched filters operating at twice the predetermined sampling rate and each having two data shift registers per tap for holding the interleaved components; and means for calculating cross-correlation values utilizing discrete-time Fourier analysis of the STCs.
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28. A cross-correlation apparatus for cross-correlating a sampled reference signal with time and frequency shifted samples of a received signal having multiple sidebands one or more of which were sampled at a predetermined sampling rate, comprising:
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means for digitally selecting and resampling one or more of the multiple sidebands; an interleaver for interleaving data components of the one or more re-sampled sidebands; a bank of code matched filters for computing short-time correlations (STCs) for the interleaved sideband data in a pipelined fashion, each code matched filter having additional data shift registers for holding the interleaved sideband data and operating at a rate equal to the product of the number of selected sidebands and the predetermined sampling rate; and means for calculating cross-correlation values utilizing discrete-time Fourier analysis of the STC outputs.
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29. A cross-correlation apparatus for cross-correlating a sampled pseudo random noise (PN) code reference signal with time and frequency shifted samples of a received signal, comprising:
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means for resampling the received signal at a rate equal to an integer multiple of the nominal chip rate; a bank of code matched filters for computing short-time correlations (STCs) in a parallel fashion of the re-sampled received signal and sampled reference signal, each code matched filter having a plurality of multipliers whose required number is divided by the integer multiple; and wherein each code matched filter'"'"'s associated summing network has a hardware for storing partial sums and adding partial sums from previous clock cycles to compute cross-correlation values.
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30. A signal processing architecture (SPA) for acquiring a received direct sequence spread spectrum (DSSS) signal, comprising:
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means for sampling the received DSSS signal at a predetermined sampling rate; means for cross-correlating, in a parallel fashion, time and frequency shifted versions of the sampled DSSS signal with samples of a locally generated replica of a pseudo random noise (PN) code sequence used to spread the spectrum of the received DSSS signal in order to obtain cross-correlation values; a Doppler compensator coupled to the cross-correlating means for processing the obtained cross-correlation values in order to compensate for misalignment effects resulting from time-companding of the received DSSS signal; an integrator for non-coherently integrating groups of the compensated cross-correlation values representing corresponding time and frequency offsets of different time segments of the received signal and replica code sequence in order to obtain correlation metrics; and a detector for detecting whether a sum of the magnitudes of the correlation metrics exceeds a detection threshold, wherein the Doppler compensator further comprises; delay means for applying delays to input streams of cross-correlation values corresponding to frequency-shifted versions of the received DSSS signal and the replica code sequence; and means for selecting appropriate delays to be applied based upon non-coherent integration counter values. - View Dependent Claims (31, 32, 33, 34, 35, 36)
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37. A signal processing architecture (SPA) for acquiring a received direct sequence spread spectrum (DSSS) signal, comprising:
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means for sampling the received DSSS signal at a predetermined sampling rate; means for cross-correlating, in a parallel fashion, time and frequency shifted versions of the sampled DSSS signal with samples of a locally generated replica of a pseudo random noise (PN) code sequence used to spread the spectrum of the received DSSS signal in order to obtain cross-correlation values; a Doppler compensator coupled to the cross-correlating means for processing the obtained cross-correlation values in order to compensate for misalignment effects resulting from time-companding of the received DSSS signal; an integrator for non-coherently integrating groups of the compensated cross-correlation values representing corresponding time and frequency offsets of different time segments of the received signal and replica code sequence in order to obtain correlation metrics; and a detector for detecting whether a sum of the magnitudes of the correlation metrics exceeds a detection threshold, wherein the cross-correlating means further comprises; a bank of code matched filters for computing short-time correlations (STCs) entirely in parallel; and means for calculating the cross-correlation values utilizing discrete-time Fourier analysis of the computed STCs; and wherein the Doppler compensator further comprises; delay means for applying delays to input streams of cross-correlation values corresponding to frequency-shifted versions of the received DSSS signal and the replica code sequence; and means for selecting appropriate delays to be applied based upon non-coherent integration counter values. - View Dependent Claims (38, 39, 40, 41, 42)
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Specification