Direct conversion RF transceiver with automatic frequency control

• US 7,224,722 B2
• Filed: 09/26/2002
• Issued: 05/29/2007
• Est. Priority Date: 01/18/2002
• Status: Expired due to Fees

• Current Assignee: Avago Technologies International Sales Pte Limited (Broadcom, Inc.)
• Original Assignee: Broadcom Corporation (Broadcom, Inc.)
• Inventors: Behzad, Arya Reza, Shi, Zhongming, Rofougaran, Ahmadreza
• Primary Examiner(s): Payne; David C.
• Assistant Examiner(s): File; Erin M.
• Application Number:
  US10/255,378
• Publication Number:
  US 20030138034A1
• Time in Patent Office: 1,706 Days
• Field of Search: 375/219, 375/222, 375/259, 375/316, 375/344, 375/346, 370/276, 455/73, 710/1
• US Class Current: 375/219
• CPC Class Codes: H03G 3/3042 in modulators, frequency-changers, transmitters or power amplifiers transmission power control in bidirectional transmission systems H04W52/04
• CPC Class Codes: H03J 7/04 where the frequency control is accomplished by varying the electrical characteristics of a non-mechanically adjustable element or where the nature of the frequency controlling element is not significant
• CPC Class Codes: H04B 1/04 Circuits
• CPC Class Codes: H04B 1/30 for homodyne or synchrodyne receivers demodulator circuits H03D1/22
• CPC Class Codes: H04B 1/408 the transmitter oscillator frequency being identical to the receiver local oscillator frequency
• CPC Class Codes: H04B 2001/0416 having gain or transmission power control

Abstract

A single chip radio transceiver includes circuitry that enables received wideband RF signals to be down-converted to baseband frequencies and baseband signals to be up-converted to wideband RF signals prior to transmission without requiring conversion to an intermediate frequency. The circuitry includes a low noise amplifier, automatic frequency control circuitry for aligning a local oscillation frequency with the frequency of the received RF signals, signal power measuring circuitry for measuring the signal to signal and power ratio and for adjusting frontal and rear amplification stages accordingly, and finally, filtering circuitry to filter high and low frequency interfering signals including DC offset.

Claims

1. A direct conversion Radio Frequency (RF) transceiver integrated circuit comprising:

a local oscillator that generates an RF local oscillation signal corresponding to an RF channel;

a receiver section operably coupled to the local oscillator to receive the RF local oscillation signal, wherein the receiver section receives an incoming RF signal, and wherein the receiver section down-converts the incoming RF signal based upon the RF local oscillation signal to produce an incoming baseband signal;

a transmitter section operably coupled to the local oscillator to receive the RF local oscillation signal, wherein the transmitter section receives an outgoing baseband signal, and wherein the transmitter section up-converts the outgoing baseband signal to produce an outgoing RF signal; and

wherein the local oscillator further comprises;

a first mixing stage comprising a frequency correcting stage that receives a frequency correction input and the uncompensated local oscillation signal having a reduced magnitude to produce a frequency correction component; and

a second mixing stage coupled to receive an uncompensated local oscillation and the frequency correction component output from the first mixing stage wherein the frequency correcting stage adjusts the uncompensated local oscillation signal based upon the frequency correction input to produce the RF local oscillation signal.

2. The RF transceiver integrated circuit of claim 1, wherein the local oscillator further comprises a phase locked loop that generates the uncompensated local oscillation signal.

3. The RF transceiver integrated circuit of claim 1, wherein the local oscillator further comprises:

a phase locked loop that generates a phase locked loop oscillation signal;

a divider circuit that receives the phase locked loop oscillation signal to produce a divided phase locked loop oscillation signal; and

a mixer that mixes the phase locked loop oscillation signal with the divided phase locked loop oscillation signal to produce the uncompensated local oscillation signal.

4. The RF transceiver integrated circuit of claim 1, wherein the local oscillator further comprises:

a phase locked loop that generates a phase locked loop oscillation signal;

a divider circuit that receives the phase locked loop oscillation signal to produce a divided phase locked loop oscillation signal;

wherein the first mixing stage that mixes the divided phase locked loop oscillation signal with the frequency correction input to produce an intermediate stage corrected oscillation signal; and

wherein the second mixing stage that mixes the intermediate stage corrected oscillation signal with the phase locked loop oscillation signal to produce the RF local oscillation signal.

5. The RF transceiver integrated circuit of claim 4, wherein the first and second mixing stages include circuitry that form an an in-phase (I) component frequency correction module and a quadrature phase (Q) component frequency correction module that produce frequency corrected I and Q component oscillation signals, respectively.

6. The RF transceiver integrated circuit of claim 5 wherein the I component frequency correction module comprises first and second I component mixers in the first mixing stage and an adder that sums the outputs of the first and second I component mixers.

7. The RF transceiver integrated circuit of claim 6 wherein the I component frequency correction module comprises an I component output mixer in the second mixing stage that is coupled to receive a summed output from the adder and the uncompensated local oscillation signal.

8. The RF transceiver integrated circuit of claim 5 wherein the Q component frequency correction module comprises first and second Q component mixers in the first mixing stage and an adder that sums the outputs of the first and second Q component mixers.

9. The RF transceiver integrated circuit of claim 8 wherein the Q component frequency correction module comprises a Q component output mixer in the second mixing stage that is coupled to receive a summed output from the adder and the uncompensated local oscillation signal.

10. The RF transceiver integrated circuit of claim 1, wherein the frequency correction input is received from a coupled baseband processor.

11. The RF transceiver integrated circuit of claim 1, further comprising a baseband processor, wherein:

the baseband processor is coupled to receive the incoming baseband signal;

the baseband processor determines the frequency correction input from the incoming baseband signal; and

the baseband processor provides the frequency correction input to the local oscillator.

12. In a Radio Frequency (RF) transceiver mixer module, a method for down-converting a received RF signal, comprising:

producing a baseband signal to a baseband processor;

receiving an I component frequency correction input and a Q component frequency correction input from the baseband processor;

receiving a first local oscillation signal;

mixing the first local oscillation signal with the I component frequency correction input in a first mixer;

receiving a second local oscillation signal;

mixing the second local oscillation signal with the Q component frequency correction input in a second mixer;

summing an output from the first mixer with an output of the second mixer to produced a summed output;

receiving an uncompensated local oscillation signal;

mixing the summed output with the uncompensated local oscillation signal to produce a compensated local oscillation signal; and

mixing the compensated local oscillation signal with the received RF signal to produce the baseband signal.

13. The method of claim 12 wherein the, step of mixing the first local oscillation signal with the I component frequency correction input in the first mixer produces first and second output tones.

14. The method of claim 13 wherein the step of mixing the second local oscillation signal with the Q component frequency correction signal in the second mixer produces first and third output tones.

15. The method of claim 14 wherein the summed output includes a signal having twice the magnitude of the first output tone and wherein the second and third output tones are of opposite magnitude and cancel each other.

16. A direct conversion Radio Frequency (RF) transceiver integrated circuit comprising:

a mixer module that generates I and Q component frequency corrected local oscillation signals corresponding to an RF channel;

a receiver section operably coupled to receive the I and Q component frequency corrected local oscillation signals and coupled to receive an incoming RF signal, wherein the receiver section down-converts the incoming RF signal based upon the I and Q component frequency corrected local oscillation signals to produce incoming I and Q baseband signal components;

a transmitter section operably coupled to receive I and Q component frequency corrected local oscillation signals and coupled to receive I and Q components of an outgoing baseband signal, wherein the transmitter section up-converts the I and Q components of the outgoing baseband signal and produces an outgoing RF signal; and

wherein the mixer module further includes;

a first mixing stage coupled to receive first and second local oscillation signals and first and second frequency correction components;

at least one adder within the first mixing stage and coupled to receive a plurality of outputs from a plurality of mixers of the first mixing stage; and

a second mixing coupled to receive an uncompensated local oscillation signal and at least one summed output from the one adder, the second mixing stage for producing the I and Q component frequency corrected local oscillation signals.

17. The direct conversion RF transceiver integrated circuit of claim 16 wherein the first mixing stage comprises first and second mixers, the first mixer coupled to receive an I component frequency correction input and the first local oscillation signal.

18. The direct conversion RF transceiver integrated circuit of claim 17 wherein the second mixer of the first mixing stage is coupled to receive a Q component frequency correction input and the second local oscillation signal.

19. The direct conversion RF transceiver integrated circuit of claim 16 wherein the first mixing stage comprises third and fourth mixers, the third mixer coupled to receive an I component frequency correction input and the second local oscillation signal.

20. The direct conversion RF transceiver integrated circuit of claim 19 wherein the fourth mixer of the first mixing stage is coupled to receive a Q component frequency correction input and the first local oscillation signal.

21. The mixer module of claim 16 wherein the at least one adder comprises first and second adders, the first adder coupled to receive mixed outputs from the first and second mixers to produce a first summed output.

22. The direct conversion RF transceiver integrated circuit of claim 19 wherein the second adder is coupled to receive mixed outputs from the third and fourth mixers to produce a second summed output.

23. The direct conversion RF transceiver integrated circuit of claim 21 wherein the second mixing stage comprises fifth and sixth mixers, the fifth mixer coupled to receive the first summed output and the uncompensated local oscillation signal, the fifth mixer producing a I component frequency corrected local oscillation signal.

24. The direct conversion RF transceiver integrated circuit of claim 23 wherein the sixth mixer is coupled to receive the second summed output and the uncompensated local oscillation signal, the sixth mixer producing a Q component frequency corrected local oscillation signal.

25. A direct conversion Radio Frequency (RF) transceiver integrated circuit, comprising:

local oscillator means for generating an RF local oscillation signal corresponding to an RF channel;

receiver means operably coupled to the local oscillator means to receive the RF local oscillation signal and that receives an incoming RF signal, the receiver means also for down-converting the incoming RF signal based upon the RF local oscillation signal to produce an incoming baseband signal;

transmitter means operably coupled to the local oscillator and to receive an outgoing baseband signal and up-converts the outgoing baseband signal, the transmitter means for producing an outgoing RF signal; and

wherein the local oscillator means further comprises;

frequency correcting means that receives a frequency correction input and a divided local oscillation signal, the frequency correcting means for producing a frequency compensated local oscillation signal component based upon the frequency correction input;

a phase locked loop that generates the phased locked loop oscillation signal as the local oscillation signal;

a divider circuit that receives the phased locked loop oscillation signal to produce the divided phased locked loop oscillation signal; and

a mixer that mixes the phased locked loop uncompensated oscillation signal with the frequency compensated local oscillation signal component to produce the compensated local oscillation signal, wherein the mixer further concludes;

a first mixing stage that mixes the divided phase locked loop oscillation signal with the frequency correction input to produce an intermediate stage corrected oscillation signal; and

a second mixing stage that mixes the intermediate stage corrected oscillation signal with the phased locked loop oscillation signal to produce the RF signal local oscillation signal.

26. The RF transceiver integrated circuit of claim 25, wherein the local oscillator means further comprises a phase locked loop that generates the uncompensated local oscillation signal.

27. The RF transceiver integrated circuit of claim 25, wherein the first mixing stage comprises:

a pair of mixers for producing I and Q frequency corrected components; and

an adder for receiving and summing the I and Q frequency corrected components.

28. The RF transceiver integrated circuit of claim 27 wherein the pair of mixers are coupled to receive a divided local oscillation signal.

29. The RF transceiver integrated circuit of claim 28 wherein the pair of mixers are coupled to receive an I component of a frequency correction input.

30. The RF transceiver integrated circuit of claim 29 wherein the pair of mixers are coupled to receive a Q component of a frequency correction input.

31. The RF transceiver integrated circuit of claim 25 wherein the second mixing stage comprises a mixer coupled to receive a frequency corrected output from the first mixing stage and coupled to receive the local oscillation signal.

32. The RF transceiver integrated circuit of claim 25, wherein the frequency correction input is received from a coupled baseband processor.

33. The RF transceiver integrated circuit of claim 25, further comprising a baseband processor, wherein:

the baseband processor is coupled to receive the incoming baseband signal;

the baseband processor determines the frequency correction input from the incoming baseband signal; and

the baseband processor provides the frequency correction input to the local oscillator.

34. A radio frequency (RF) integrated circuit transceiver, comprising:

baseband processing circuitry for processing incoming baseband signals and for generating outgoing baseband signals;

first amplifier means for amplifying a received RF signal and for producing an amplified RF signal;

multi-stage mixing means for mixing the amplified RF signal to produce down-converted baseband signals with at least one frequency compensated local oscillation signal and with an uncompensated local oscillation signal;

second amplifier means for amplifying down-converted baseband signals received from the mixing means to produce incoming baseband signals to the baseband processing circuitry; and

wherein the multi-stage mixing means includes first and second mixing stages, wherein the first mixing stage comprises first, second, third and fourth mixers wherein the first and third mixers are coupled to receive I component frequency correction signals and wherein the second and fourth mixers are coupled to receive Q component frequency correction signals.

35. The RF integrated circuit transceiver of claim 34 wherein the multistage mixing means includes first and second mixing stages, the first mixing stage for mixing a frequency correction input with a divided local oscillation signal.

36. The RF integrated circuit transceiver of claim 34 wherein the second stage of the multi-stage mixing means is operable to mix a summed output produced by the first stage with an uncompensated local oscillation signal.

37. The RF integrated circuit transceiver of claim 34 wherein the first mixing stage of the multi-stage mixing means is operable to mix the frequency correction input with a divided local oscillation signal to produce a plurality of additive oscillation signal components that are summed to produce a summed component.

38. The RF integrated circuit transceiver of claim 37 wherein the plurality of additive oscillation signal components comprise four additive components that, when summed, produce one summed component.

39. The RF integrated circuit transceiver of claim 37 wherein the plurality of additive oscillation signal components comprise eight additive components that, when summed, produce two summed components wherein a first summed component is an I component reference local oscillation signal and wherein a second summed component is a Q component reference local oscillation signal.

40. The RF integrated circuit transceiver of claim 34 wherein the first and fourth mixers are coupled to receive Q component divided local oscillation signals.

41. The RF integrated circuit transceiver of claim 34 wherein the second and third mixers are coupled to receive Q component divided local oscillation signals.

42. The RF integrated circuit transceiver of claim 41 further including first and second adders wherein the first adder is coupled to receive outputs from the first and second mixers to produced a first summed result and wherein the second adder is coupled to receive outputs from the third and fourth mixers to produce a second summed result and further wherein the first adder produces a cosine of a sum of the divided local oscillation signal and the I component frequency correction signal and wherein the second adder produces a sine of the divided local oscillation signal and the Q component frequency correction signal.