Control architecture for a high-throughput multi-processor channel decoding system
First Claim
1. A multi-processor unit, including:
- communication means for receiving data into the unit and transmitting data from the unit;
first domain processing means for first processing the data depending on first domain configuration information, the first domain processing means including multiple first domain processors each connected to the communication means for receiving data and transmitting data to the communication means including data transmitted between processors, each first domain processor differently sub-processing the data in order to first process the data, the first domain processors including a first domain control processor for controlling the first processing of the first domain;
second domain processing means for second processing the first processed data depending on second domain configuration information, the second processing being different than the first processing, the second domain processing means including multiple second domain processor each connected to the communication means for receiving data and transmitting data to the communication means including data transmitted between processors, each second domain processor differently sub-processing the data in order to second process the data, the second domain processors including a second domain control processor for controlling the second processing of the second domain; and
a global control processor connected to the communication means for providing the first domain configuration information and the second domain configuration information through the communication means for configuring the first and second domains.
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Abstract
A multi-processor unit includes a first domain for processing data according to first configuration information and having multiple first domain processors each connected to communication apparatus and each performing a different function of the first processing. The first domain processors include a first domain control processor for controlling the first processing of the first domain. The multi-processor unit also includes a second domain for second processing of the first processed data depending on a second domain configuration and having multiple second domain processors each connected to the communication apparatus and each performing a different function of the second processing. The second domain processors include a second domain control processor for controlling the second processing of the second domain. The multi-processor unit also including a global control processor connected to the communication means for providing the first domain configuration information and the second domain configuration information through the communication means for configuring the first and second domains.
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Citations
20 Claims
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1. A multi-processor unit, including:
- communication means for receiving data into the unit and transmitting data from the unit;
first domain processing means for first processing the data depending on first domain configuration information, the first domain processing means including multiple first domain processors each connected to the communication means for receiving data and transmitting data to the communication means including data transmitted between processors, each first domain processor differently sub-processing the data in order to first process the data, the first domain processors including a first domain control processor for controlling the first processing of the first domain; second domain processing means for second processing the first processed data depending on second domain configuration information, the second processing being different than the first processing, the second domain processing means including multiple second domain processor each connected to the communication means for receiving data and transmitting data to the communication means including data transmitted between processors, each second domain processor differently sub-processing the data in order to second process the data, the second domain processors including a second domain control processor for controlling the second processing of the second domain; and
a global control processor connected to the communication means for providing the first domain configuration information and the second domain configuration information through the communication means for configuring the first and second domains. - View Dependent Claims (2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12)
- communication means for receiving data into the unit and transmitting data from the unit;
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13. A multi-processor system for processing data, including:
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a plurality of memory blocks in an electronic memory; block-based communication means connected to the memory blocks to provide access to the memory blocks;
stream-based communication means;a plurality of processors connected to the block-based communication means for processing data in the memory blocks and connected to the stream-based communication means for providing data objects from a processor to a subsequent processor, the data objects including data for processing the data and pointers to memory blocks to control access to the memory blocks, the processors having means for data flow driven process control so that receiving data objects from a previous processor through the stream-based communication means triggers processing by the subsequent processor that receives those data objects, each processor having exclusive control for accessing data in one or more of the memory blocks, and each processor receiving the exclusive control of a memory block by receiving the pointer to the memory block from the previous processor through the stream-based communications means and each processor yielding exclusive control to the subsequent processor by providing a pointer to the memory block to the subsequent processor through the stream-based communication means. - View Dependent Claims (14, 15, 20)
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16. The multi-processor unit of system 13, wherein control of the domains by the domain control processor is provided directly through control lines to the other domain processors from the domain control processor.
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17. The multi-processor unit of system 13, wherein each processor is structurally different from the other processors of the multi-processor unit for performing a different portion of channel decoding of transmission signals.
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18. The multi-processor unit of system 13, wherein the first and second domain configuration information configures the domains for channel decoding transmissions based on different modulation standards.
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19. The multi-processor unit of system 13, wherein the configuration information provided by the global control processor at times configures the first domain processing means and the second domain processing means for channel decoding 8-VSB transmissions based on the ATSC standard.
Specification