Semiconductor devices and semiconductor device components with peripherally located, castellated contacts, assemblies and packages including such semiconductor devices or packages and associated methods

• US 7,226,809 B2
• Filed: 05/19/2003
• Issued: 06/05/2007
• Est. Priority Date: 06/18/2002
• Status: Expired due to Fees

• Current Assignee: Micron Technology, Inc.
• Original Assignee: Micron Technology, Inc.
• Inventors: Jeung, Boon Suan, Poo, Chia Yong, Loo, Neo Yong, Kwang, Chua Swee, Waf, Low Siu, Yu, Chan Min
• Primary Examiner(s): Vu; David
• Application Number:
  US10/440,590
• Publication Number:
  US 20030232462A1
• Time in Patent Office: 1,478 Days
• Field of Search: 438107-111, 438/614, 438/666, 257685-686, 257/690, 257/693, 257/698, 257/734, 257/777, 257/E33.056, 257/E23.001, 257/E21.499
• US Class Current: 438/109
• CPC Class Codes: H01L 2224/16145 the bodies being stacked
• CPC Class Codes: H01L 2225/1035 the device being entirely enclosed by the support, e.g. high-density interconnect [HDI]
• CPC Class Codes: H01L 2225/1064 Electrical connections provided on a side surface of one or more of the containers
• CPC Class Codes: H01L 23/13 characterised by the shape
• CPC Class Codes: H01L 23/3128 the substrate having spherical bumps for external connection
• CPC Class Codes: H01L 23/49805 the leads being also applied on the sidewalls or the bottom of the substrate, e.g. leadless packages for surface mounting
• CPC Class Codes: H01L 25/105 the devices being of a type provided for in group H01L27/00
• CPC Class Codes: H01L 2924/01078 Platinum [Pt]
• CPC Class Codes: H01L 2924/01079 Gold [Au]
• CPC Class Codes: H01L 2924/01087 Francium [Fr]
• CPC Class Codes: H01L 2924/09701 Low temperature co-fired ceramic [LTCC]
• CPC Class Codes: H01L 2924/15311 being a ball array, e.g. BGA
• CPC Class Codes: H01L 2924/19041 being a capacitor
• CPC Class Codes: H05K 1/141 One or more single auxiliary printed circuits mounted on a main printed circuit, e.g. modules, adapters H05K1/142 and H05K1/147 take precedence
• CPC Class Codes: H05K 2201/045 Hierarchy auxiliary PCB, i.e. more than two levels of hierarchy for daughter PCBs are important
• CPC Class Codes: H05K 2201/049 PCB for one component, e.g. for mounting onto mother PCB
• CPC Class Codes: H05K 2201/09181 Notches in edge pads
• CPC Class Codes: H05K 2201/10727 Leadless chip carrier [LCC], e.g. chip-modules for cards
• CPC Class Codes: H05K 3/3436 having an array of bottom contacts, e.g. pad grid array or ball grid array components
• CPC Class Codes: H05K 3/3442 having edge contacts, e.g. leadless chip capacitors, chip carriers
• CPC Class Codes: H05K 3/403 : Edge contacts; Windows or holes in the substrate having plural connections on the walls thereof H05K3/4092 takes precedence

Abstract

A multichip assembly includes semiconductor devices or semiconductor device components with outer connectors on peripheral edges thereof. The outer connectors are formed by creating via holes along boundary lines between adjacent, unsevered semiconductor devices, or semiconductor device components, then plating or filling the holes with conductive material. When adjacent semiconductor devices or semiconductor device components are severed from one another, the conductive material in each via between the semiconductor devices is bisected. The semiconductor devices and components of the multichip assembly may have different sizes, as well as arrays of outer connectors with differing diameters and pitches. Either or both ends of each outer connector may be electrically connected to another aligned outer connector or contact area of another semiconductor device or component. Assembly in this manner provides a low-profile stacked assembly.

Claims

1. A method for assembling semiconductor device components, comprising:

positioning a semiconductor die, a plurality of conductive connectors carried by at least one peripheral edge of the semiconductor die, over a surface of a carrier and in substantially parallel relation to the surface;

aligning at least some conductive connectors of the plurality of conductive connectors with corresponding contact areas of the plurality of contact areas on the surface of the carrier; and

electrically connecting the at least some conductive connectors with the corresponding contact areas.

2. The method of claim 1, wherein positioning the semiconductor die comprises positioning the semiconductor die over a surface of at least one of an intermediate substrate, a support substrate, a circuit board, and a semiconductor device.

3. The method of claim 1, wherein positioning the second semiconductor device component comprises positioning a second semiconductor device component with at least some conductive connectors of the plurality of conductive connectors including recesses formed therein and extending substantially from a first major surface of the semiconductor die to an opposite, second major surface of the semiconductor die.

4. The method of claim 3, wherein positioning the semiconductor die comprises positioning the semiconductor die with the recesses of the at least some conductive connectors comprising semicylindrical recesses.

5. The method of claim 4, wherein positioning the semiconductor die comprises positioning the semiconductor die over a carrier including at least some contact areas of the plurality of contact areas that are located on a peripheral edge thereof.

6. The method of claim 5, wherein positioning the semiconductor die comprises positioning the semiconductor die over a carrier including at least some contact areas of the plurality of contact areas that include recesses formed therein that extend substantially from a first major surface of the carrier to an opposite, second major surface of the carrier.

7. The method of claim 6, wherein aligning comprises aligning at least some recesses of the recesses of the at least some conductive connectors of the semiconductor die with corresponding recesses of the at least some contact areas of the carrier.

8. The method of claim 7, wherein electrically connecting includes introducing a preformed elongate conductive element within aligned recesses of at least one conductive connector of the at least some conductive connectors and of at least one contact area of the at least some contact areas.

9. The method of claim 3, wherein electrically connecting comprises introducing an elongate conductive element that is in electrical communication with a contact area of the plurality of contact areas of the carrier into a recess of a corresponding conductive connector of the at least some conductive connectors of the semiconductor die so as to contact a surface of the corresponding conductive connector.

10. The method of claim 1, wherein electrically connecting comprises placing conductive material between the at least some conductive connectors and the corresponding contact areas.

11. The method of claim 10, wherein electrically connecting further comprises bonding discrete quantities of the conductive material to each conductive connector of the at least some conductive connectors and a corresponding contact area of the corresponding contact areas.

12. The method of claim 10, wherein placing conductive material comprises placing solder between the at least some conductive connectors and the corresponding contact areas.

13. A method for assembling semiconductor device components, comprising:

positioning a semiconductor die, a plurality of conductive connectors located on at least one peripheral edge of the semiconductor die, over and in substantially parallel relation to a surface of a carrier;

aligning at least some conductive connectors of the plurality of conductive connectors with corresponding contact areas of the carrier; and

positioning the at least some conductive connectors against the corresponding contact areas.

14. The method of claim 13, wherein positioning comprises positioning the semiconductor die over the surface of a carrier comprising at least one of an intermediate substrate, a support substrate, a circuit board, and a semiconductor device.

15. The method of claim 13, wherein positioning the semiconductor die comprises positioning a semiconductor die with at least some conductive connectors of the plurality of conductive connectors including recesses formed therein and extending substantially from a first major surface of the semiconductor die to an opposite, second major surface of the semiconductor die.

16. The method of claim 15, wherein positioning the second semiconductor device comprises positioning the semiconductor die with the recesses of the at least some conductive connectors comprising semicylindrical recesses.

17. The method of claim 16, wherein positioning comprises positioning the semiconductor die over the surface of a carrier comprising at least some contact areas of the plurality of contact areas that are located on a peripheral edge thereof.

18. The method of claim 17, wherein positioning comprises positioning the semiconductor die over the surface of a carrier comprising at least some contact areas of the plurality of contact areas that include recesses formed therein and that extend substantially from a first major surface of the carrier to an opposite, second major surface of the carrier.

19. The method of claim 18, wherein aligning comprises aligning at least some recesses of the recesses of the at least some conductive connectors of the semiconductor die with corresponding recesses of the at least some contact areas of the carrier.

20. The method of claim 19, wherein electrically connecting includes introducing a preformed elongate conductive element within aligned recesses of at least one conductive connector of the at least some conductive connectors and of at least one contact area of the at least some contact areas.

21. The method of claim 15, wherein electrically connecting comprises introducing an elongate conductive element that is in electrical communication with a contact area of the plurality of contact areas of the carrier into a recess of a corresponding conductive connector of the at least some conductive connectors of the semiconductor die so as to contact a surface of the corresponding conductive connector.

22. The method of claim 13, wherein electrically connecting comprises placing conductive material between the at least some conductive connectors and the corresponding contact areas.

23. The method of claim 22, wherein electrically connecting further comprises bonding discrete quantities of the conductive material to each conductive connector of the at least some conductive connectors and a corresponding contact area of the corresponding contact areas.

24. The method of claim 22, wherein placing conductive material comprises placing solder between the at least some conductive connectors and the corresponding contact areas.

25. A method for assembling semiconductor device components, comprising:

positioning a semiconductor die over a surface of a carrier, at least one conductive connector located on or adjacent to at least one peripheral edge of the semiconductor die, the at least one conductive connector including a recess in a surface thereof, the recess extending substantially from a first major surface of the semiconductor die to an opposite, second major surface of the semiconductor die;

aligning the at least one conductive connector with a corresponding contact area on the surface of the carrier; and

electrically connecting the at least one conductive connector with the corresponding contact area.

26. The method of claim 25, wherein positioning the semiconductor die comprises positioning the semiconductor die over a surface of at least one of an intermediate substrate, a support substrate, a circuit board, and a semiconductor device.

27. The method of claim 25, wherein positioning the semiconductor die comprises positioning the semiconductor die with the recess of the at least one conductive connector comprising a semicylindrical recess.

28. The method of claim 27, wherein positioning the semiconductor die comprises positioning the semiconductor die over a carrier including at least one contact area located on a peripheral edge thereof.

29. The method of claim 28, wherein positioning the semiconductor die comprises positioning the semiconductor die over a carrier including at least one contact area that includes a recess formed therein that extends substantially from a first major surface of the carrier to an opposite, second major surface of the carrier.

30. The method of claim 29, wherein aligning comprises aligning the recess of the recesses of the at least one conductive connector of the semiconductor die with the recess of the at least one contact area of the carrier.

31. The method of claim 30, wherein electrically connecting includes introducing an elongate conductive element within aligned recesses of the at least one conductive connector and of the at least one contact area.

32. The method of claim 25, wherein electrically connecting comprises introducing a preformed elongate conductive element that is in electrical communication with the at least one contact area of the carrier into the recess of the at least one conductive connector of the semiconductor die so as to contact a surface of the at least one conductive connector.

33. The method of claim 25, wherein electrically connecting comprises placing conductive material between the at least one conductive connector and the corresponding contact area.

34. The method of claim 33, wherein electrically connecting further comprises bonding discrete quantities of the conductive material to the at least one conductive connector and the corresponding contact area.

35. The method of claim 33, wherein placing conductive material comprises placing solder between the at least one conductive connector and the corresponding contact area.

36. A method for assembling semiconductor device components, comprising:

positioning a second semiconductor device component, including;

a plurality of conductive connectors carried by at least one peripheral edge thereof; and

a corresponding plurality of conductive traces carried by and extending across a surface thereof,

over a surface of a first semiconductor device component and in substantially parallel relation to the surface;

aligning at least some conductive connectors of the plurality of conductive connectors with corresponding contact areas of the plurality of contact areas on the surface of the first semiconductor device component; and

electrically connecting the at least some conductive connectors with the corresponding contact areas.

37. The method of claim 36, wherein positioning the second semiconductor device component comprises positioning the second semiconductor device component over a surface of at least one of an intermediate substrate, a support substrate, a circuit board, and a semiconductor device.

38. The method of claim 36, wherein the second semiconductor device component comprises a semiconductor device.

39. The method of claim 36, wherein positioning the second semiconductor device component comprises positioning a second semiconductor device component with at least some conductive connectors of the plurality of conductive connectors including recesses formed therein and extending substantially from a first major surface of the second semiconductor device component to an opposite, second major surface of the second semiconductor device component.

40. The method of claim 39, wherein positioning the second semiconductor device component comprises positioning the second semiconductor device component with the recesses of the at least some conductive connectors comprising semicylindrical recesses.

41. The method of claim 40, wherein positioning the second semiconductor device component comprises positioning the second semiconductor device component over a first semiconductor device component including at least some contact areas of the plurality of contact areas that are located on a peripheral edge thereof.

42. The method of claim 41, wherein positioning the second semiconductor device component comprises positioning the second semiconductor device component over a first semiconductor device component including at least some contact areas of the plurality of contact areas that include recesses formed therein that extend substantially from a first major surface of the first semiconductor device component to an opposite, second major surface of the first semiconductor device component.

43. The method of claim 42, wherein aligning comprises aligning at least some recesses of the recesses of the at least some conductive connectors of the second semiconductor device component with corresponding recesses of the at least some contact areas of the first semiconductor device component.

44. The method of claim 43, wherein electrically connecting includes introducing a preformed elongate conductive element within aligned recesses of at least one conductive connector of the at least some conductive connectors and of at least one contact area of the at least some contact areas.

45. The method of claim 39, wherein electrically connecting comprises introducing an elongate conductive element that is in electrical communication with a contact area of the plurality of contact areas of the first semiconductor device component into a recess of a corresponding conductive connector of the at least some conductive connectors of the second semiconductor device component so as to contact a surface of the corresponding conductive connector.

46. The method of claim 36, wherein electrically connecting comprises placing conductive material between the at least some conductive connectors and the corresponding contact areas.

47. The method of claim 46, wherein electrically connecting further comprises bonding discrete quantities of the conductive material to each conductive connector of the at least some conductive connectors and a corresponding contact area of the corresponding contact areas.

48. The method of claim 47, wherein placing conductive material comprises placing solder between the at least some conductive connectors and the corresponding contact areas.