Dense semiconductor fuse array

• US 7,227,207 B2
• Filed: 03/03/2005
• Issued: 06/05/2007
• Est. Priority Date: 03/03/2005
• Status: Active Grant

• Current Assignee: Globalfoundries US Incorporated (GlobalFoundries, Inc.)
• Original Assignee: International Business Machines Corporation
• Inventors: Park, Byeongju, Kothandaraman, Chandrasekharan, Iyer, Subramanian S.
• Primary Examiner(s): Huynh; Andy
• Assistant Examiner(s): Nguyen; Tram Hoang
• Application Number:
  US10/906,718
• Publication Number:
  US 20060197179A1
• Time in Patent Office: 824 Days
• Field of Search: 257/209, 257/529, 257/E23.149, 438/132, 438/215, 438/281, 438/333, 438/601, 315/294, 361/534
• US Class Current: 257/292
• CPC Class Codes: G11C 17/16 using electrically-fusible links
• CPC Class Codes: H01L 23/5256 comprising fuses, i.e. connections having their state changed from conductive to non-conductive
• CPC Class Codes: H01L 27/10 including a plurality of individual components in a repetitive configuration
• CPC Class Codes: H01L 2924/00 Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
• CPC Class Codes: H01L 2924/0002 Not covered by any one of groups H01L24/00, H01L24/00 and H01L2224/00
• CPC Class Codes: H01L 2924/3011 Impedance

Abstract

The present invention provides a dense semiconductor fuse array having common cathodes. The dense semiconductor fuse array of the present invention occupies less area than conventional semiconductor fuse arrays, can comprise integrated diodic components, and can require only one metal wiring layer for making electrical connections to the fuse array.

Claims

1. A semiconductor fuse arrangement, comprising:

a plurality of electrical conductors;

a common cathode insulated from the plurality of electrical conductors; and

a plurality of fuses, each fuse having an anode coupled to a fuse link, each anode being coupled to one of the plurality of electrical conductors, at least two fuse links being disposed along a row of fuses and being coupled to the common cathode, an additional fuse of the plurality being disposed along the row and intermediately of the at least two fuse links, the fuse link of the additional fuse being coupled to an additional common cathode electrically insulated from the common cathode.

2. The semiconductor fuse array of claim 1, further comprising an access circuit coupled to the plurality of electrical conductors, adapted to select one of the plurality of electrical conductors.

3. The semiconductor fuse array of claim 2, wherein the access circuit comprises a plurality of transistors.

4. The semiconductor fuse array of claim 1, wherein the common cathode, anodes and fuse links comprise a material selected from the group consisting of polysilicon, amorphous polysilicon, amorphous silicon, epitaxial silicon, and silicon germanium alloys.

5. The semiconductor fuse array of claim 1, wherein the fuse links are formed in accordance with a shape selected from the group consisting of straight, necked, and folded.

6. The semiconductor fuse array of claim 1, further comprising a silicide layer formed on the common cathode, anodes, and fuse links.

7. The semiconductor fuse array of claim 1, further comprising a plurality of conductive contacts, each anode being coupled to at least one of the plurality of conductive contacts and the common cathode being coupled to at least one of the plurality of conductive contacts, wherein the anodes and common cathode are not coupled to the same conductive contacts.

8. The semiconductor fuse array of claim 7, wherein each anode is doped with a first dopant and the common cathode is doped with a second dopant.

9. The semiconductor fuse array of claim 8, further comprising a suicide layer formed on the common cathode, anodes, fuse links, and conductive contacts.