Graphics display system with video synchronization feature
First Claim
1. A method of synchronizing video, comprising:
- converting a stream of input video samples having an input sample rate to first video samples having a first converted rate;
filtering at least one of the first video samples having the first converted rate;
converting the first video samples having the first converted rate to second video samples having a second converted rate;
receiving the second video samples into a FIFO of a time base corrector; and
synchronizing the second video samples to a display clock using the FIFO to provide output video samples that are synchronous to the display clock.
5 Assignments
0 Petitions
Accused Products
Abstract
A graphics integrated circuit chip is used in a set-top box for controlling a television display. The graphics chip processes analog video input, digital video input, graphics input and audio input simultaneously. The system includes a video decoder having a chroma-locked sample rate converter. The chroma-locked sample rate converter converts the samples to those taken at a sample rate that is a multiple of the chroma subcarrier frequency and that is locked to chroma bursts of the analog video signal in a control loop. The video decoder also includes a line-locked sample rate converter that receives samples at a multiple of the chroma subcarrier frequency and converts the samples to samples with a sample frequency that is a multiple of the horizontal line rate of the video input. The line-locked sample rate converter measures the horizontal line rate to an accuracy of a fraction of a pixel and adjusts the sample rate and phase of the line-locked sample rate converter to produce accurate line-locked samples. The time base corrector receives samples at the output of the line-locked sample rate converter and provides samples synchronized to the display clock for reducing undesirable artifacts such as jitter.
-
Citations
10 Claims
-
1. A method of synchronizing video, comprising:
-
converting a stream of input video samples having an input sample rate to first video samples having a first converted rate; filtering at least one of the first video samples having the first converted rate; converting the first video samples having the first converted rate to second video samples having a second converted rate; receiving the second video samples into a FIFO of a time base corrector; and synchronizing the second video samples to a display clock using the FIFO to provide output video samples that are synchronous to the display clock. - View Dependent Claims (2, 3, 4, 5, 6, 7, 8, 9, 10)
-
Specification