Apparatus for reducing data corruption in a non-volatile memory

• US 7,227,803 B2
• Filed: 07/31/2003
• Issued: 06/05/2007
• Est. Priority Date: 07/31/2003
• Status: Expired due to Fees

• Current Assignee: Avago Technologies International Sales Pte Limited (Broadcom, Inc.)
• Original Assignee: Brocade Communications Systems, Inc. (Broadcom, Inc.)
• Inventors: Lee, Michael K. T., Doan, Chanh Van
• Primary Examiner(s): TRAN, MICHAEL THANH
• Application Number:
  US10/633,264
• Publication Number:
  US 20050024968A1
• Time in Patent Office: 1,405 Days
• Field of Search: 365/228, 365/226
• US Class Current: 365/228
• CPC Class Codes: G11C 16/30 Power supply circuits

Abstract

The loss of data and/or the corruption of data that may occur in flash memory when a reset signal is received during a memory write cycle is prevented by delaying reset signals sent to the flash memory for a time period sufficient for a write cycle to be completed. The loss of data and/or the corruption of data that may occur in flash memory when the power supply is interrupted during a write cycle is prevented by providing a DC-to-DC converter with one or more large capacitors in parallel with its input as the power supply to the flash memory. If the system power supply fails or is interrupted, the discharge of the capacitor(s) delays the voltage decay at the input of the DC-to-DC converter such that the output of the DC-to-DC converter remains within tolerance for a time sufficient for the flash memory to complete a write cycle.

Claims

1. A circuit for delaying power interruption to a non-volatile memory device comprising:

a power supply having an output connected to the non-volatile memory device;

a charge-storing device connected to the output of the power supply; and

,

a DC-to-DC converter connected at its input to the charge-storing device and the power supply and connected at its output to the non-volatile memory device such that upon interruption of the power supply, the charge-storing device provides sufficient input voltage to the DC-to-DC converter to provide rated output to the non-volatile memory device for a time sufficient for the non-volatile memory device to complete a write cycle.

2. A circuit as recited in claim 1 wherein the charge-storing device is a capacitor.

3. A circuit as recited in claim 1 wherein the charge-storing device is an electrolytic capacitor.

4. A circuit as recited in claim 1 wherein the charge-storing device is a super capacitor.

5. A circuit as recited in claim 1 wherein the charge-storing device comprises a plurality of capacitors connected in parallel.

6. A circuit as recited in claim 1 further comprising an inductor connected in parallel with the DC-to-DC converter.

7. A circuit as recited in claim 6 further comprising a diode connected in series between the inductor and the output of the DC-to-DC converter.

8. A circuit as recited in claim 1 further comprising a diode at the input of the charge storing device connected such that the flow of electric current from the charge-storing device to the power supply is prevented.

9. A circuit as recited in claim 1 wherein the non-volatile memory device is a NAND-type flash memory.

10. A method of supplying power to a non-volatile memory device comprising:

providing regulated power from a power supply;

storing electrical charge from the power supply in a charge-storing device;

transferring the stored electrical charge upon interruption of the power supply to the input of a DC-to-DC converter at a potential sufficient to operate the DC-to-DC converter; and

supplying regulated DC power from the output of the DC-to-DC converter to the non-volatile memory device for a time sufficient for the non-volatile memory device to complete a full write cycle.

11. A method of preventing data corruption in a non-volatile memory device comprising:

determining whether a control signal sent to the non-volatile memory device is a reset signal;

delaying the control signal if the control signal is a reset signal for time sufficient for the non-volatile memory device to complete a memory write cycle;

providing regulated power from a power supply to the non-volatile memory device;

storing electrical charge from the power supply in a charge-storing device;

transferring the stored electrical charge upon interruption of the power supply to the input of a DC-to-DC converter at a potential sufficient to operate the DC-to-DC converter; and

supplying regulated DC power from the output of the DC-to-DC convener to the non-volatile memory device for a time sufficient for the non-volatile memory device to complete a write cycle.

12. A method as recited in claim 11 wherein the non-volatile memory device is a flash memory.

13. A method as recited in claim 12 wherein the flash memory is a NAND-type flash memory.