Ground-enhanced semiconductor package and lead frame for the same

• US 7,230,323 B2
• Filed: 08/05/2003
• Issued: 06/12/2007
• Est. Priority Date: 05/28/2003
• Status: Expired due to Term

• Current Assignee: Silicon Precision Industries Company Limited, Siliconware Precision Industries Co., Ltd.
• Original Assignee: Siliconware Precision Industries Co., Ltd.
• Inventors: Li, Chun-Yuan, Yun, Chih-Yung, Chen, Holman, Lee, Yi-Shiung, Huang, Shih-Tsun
• Primary Examiner(s): Crane; Sara
• Assistant Examiner(s): Gebremariam; Samuel A.
• Application Number:
  US10/635,245
• Publication Number:
  US 20040238921A1
• Time in Patent Office: 1,407 Days
• Field of Search: 257/666, 257/670, 257/690, 257/691, 257/692, 257/676, 257/698
• US Class Current: 257/670
• CPC Class Codes: H01L 2224/05554 being square
• CPC Class Codes: H01L 2224/05599 Material
• CPC Class Codes: H01L 2224/32257 the layer connector connecting to a bonding area disposed in a recess of the surface of the item
• CPC Class Codes: H01L 2224/45099 Material
• CPC Class Codes: H01L 2224/48091 Arched
• CPC Class Codes: H01L 2224/48095 Kinked
• CPC Class Codes: H01L 2224/48247 connecting the wire to a bond pad of the item
• CPC Class Codes: H01L 2224/48253 connecting the wire to a potential ring of the item
• CPC Class Codes: H01L 2224/49171 Fan-out arrangements
• CPC Class Codes: H01L 23/49503 characterised by the die pad
• CPC Class Codes: H01L 23/49541 Geometry of the lead-frame
• CPC Class Codes: H01L 24/48 of an individual wire connector
• CPC Class Codes: H01L 24/49 of a plurality of wire connectors
• CPC Class Codes: H01L 2924/00 Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
• CPC Class Codes: H01L 2924/00012 Relevant to the scope of the group, the symbol of which is combined with the symbol of this group
• CPC Class Codes: H01L 2924/00014 the subject-matter covered by the group, the symbol of which is combined with the symbol of this group, being disclosed without further technical details
• CPC Class Codes: H01L 2924/01005 Boron [B]
• CPC Class Codes: H01L 2924/01029 Copper [Cu]
• CPC Class Codes: H01L 2924/181 Encapsulation
• CPC Class Codes: H01L 2924/351 Thermal stress

Abstract

A ground-enhanced semiconductor package and a lead frame used in the package are provided. The semiconductor package includes a lead frame having a die pad, a plurality of tie bars connected with and supporting the die pad, a plurality of leads surrounding the die pad, and a ground structure, wherein the ground structure comprises at least one of first ground portions connected to the tie bars, and/or at least one of second ground portions connected to the die pad, and wherein the first ground portions are separate from each other, and the second ground portions are separate from each other; at least one chip mounted on the die pad and electrically connected to the leads and the ground structure; and an encapsulation body for encapsulating the chip and the lead frame. The separately-arranged ground portions allow thermal stresses to be released from the ground structure without rendering deformation issues.

Claims

1. A ground-enhanced semiconductor package, comprising:

a lead frame having at least one die pad, a plurality of tie bars connected with and supporting the die pad, a plurality of leads surrounding the die pad, and a plurality of ground structures surrounding the die pad;

wherein the ground structures are separated from each other and each of the ground structures comprises at least one of first ground portions directly connected to the tie bars so as to prevent deformation of the ground structure to assure grounding performance of the semiconductor package, wherein the first ground portions are separate from each other and are connected to both lateral sides of the tie bars, and a hollow-out area is formed between the first ground portions;

at least one chip mounted on the die pad and electrically connected to the leads and the first ground portion of the ground structure by bonding wires; and

an encapsulation body for encapsulating the chip and the lead frame.

2. The ground-enhanced semiconductor package of claim 1, further comprising at least one of second ground portions connected to the die pad, wherein the second ground portions are separate from each other and from the first ground portions.

3. The ground-enhanced semiconductor package of claim 2, wherein the second ground portion comprises a ground area and at least one connection area which are interconnected to form a hollow-out area together with a side edge of the die pad.

4. The ground-enhanced semiconductor package of claim 2, wherein each side edge of the die pad is formed with at least one of the second ground portions.

5. The ground-enhanced semiconductor package of claim 1, wherein the first ground portion is connected to the die pad.

6. The ground-enhanced semiconductor package of claim 5, wherein the first ground portion comprises a ground area and a connection area which are interconnected to form the hollow-out area together with one of the tie bars.

7. The ground-enhanced semiconductor package of claim 1, wherein the first ground portion is not connected to the die pad.

8. The ground-enhanced semiconductor package of claim 7, wherein the first ground portion is shaped as a strip.

9. The ground-enhanced semiconductor package of claim 1, wherein each of the tie bars is formed with at least one of the first ground portions.

10. A lead frame for a semiconductor package, comprising:

a body having at least one die pad, a plurality of tie bars connected with and supporting the die pad, and a plurality of leads surrounding the die pad; and

a plurality of ground structures surrounding the die pad, wherein the ground structures are separated from each other and each of the ground structures comprises at least one of first ground portions directly connected to the tie bars so as to prevent deformation of the ground structure to assure grounding performance of the semiconductor package, wherein the first ground portions are separate from each other and are connected to both lateral sides of the tie bars, and a hollow-out area is formed between the first ground portions.

11. The lead frame of claim 10, further comprising at least one of second ground portions connected to the die pad, wherein the second ground portions are separate from each other and from the first ground portions.

12. The lead frame of claim 11, wherein the second ground portion comprises a ground area and at least one connection area which are interconnected to form a hollow-out area together with a side edge of the die pad.

13. The lead frame of claim 11, wherein each side edge of the die pad is formed with at least one of the second ground portions.

14. The lead frame of claim 10, wherein the first ground portion is connected to the die pad.

15. The lead frame of claim 14, wherein the first ground portion comprises a ground area and a connection area which are interconnected to form the hollow-out area together with one of the tie bars.

16. The lead frame of claim 14, wherein the first ground portion is not connected to the die pad.

17. The lead frame of claim 16, wherein the first ground portion is shaped as a strip.

18. The lead frame of claim 10, wherein each of the tie bars is formed with at least one of the first ground portions.