Content addressable memory with configurable class-based storage partition

• US 7,230,840 B2
• Filed: 10/12/2004
• Issued: 06/12/2007
• Est. Priority Date: 06/08/2000
• Status: Expired due to Term

• Current Assignee: Avago Technologies International Sales Pte Limited (Broadcom, Inc.)
• Original Assignee: Netlogic Microsystems Incorporated (Broadcom, Inc.)
• Inventors: Srinivasan, Varadarajan, Pereira, Jose P.
• Primary Examiner(s): LE, THONG QUOC
• Application Number:
  US10/964,121
• Publication Number:
  US 20050063241A1
• Time in Patent Office: 973 Days
• Field of Search: 365/149, 365/189.07, 365/49, 365/52
• US Class Current: 365/49.15
• CPC Class Codes: G06F 16/90339 by using parallel associative memories or content-addressable memories
• CPC Class Codes: G11C 15/00 Digital stores in which information comprising one or more characteristic parts is written into the store and in which information is read-out by searching for one or more of these characteristic parts, i.e. associative or content-addressed stores
• CPC Class Codes: G11C 15/04 using semiconductor elements

Abstract

A content addressable memory (CAM) device having a plurality of CAM blocks and a block selection circuit. Each of the CAM blocks includes an array of CAM cells to store data words having a width determined according to a configuration value. The block selection circuit includes an input to receive a class code and circuitry to output a plurality of select signals to the plurality of CAM blocks. Each of the select signals selectively disables a respective one of the plurality of CAM blocks from participating in a compare operation according to whether the class code matches a class assignment of the CAM block.

Claims

1. A content addressable memory (CAM) device comprising:

storage arrays each having a plurality of CAM cells; and

a select circuit to receive a search code and to selectively enable the storage arrays to participate in a compare operation based, at least in part, on whether the storage arrays have a logical width that meets a width criterion conveyed in the search code.

2. The CAM device of claim 1 wherein the select circuit comprises a plurality of compare circuits to compare the search code with values that indicate widths of the storage arrays.

3. The CAM device of claim 2 further comprising programmable circuitry to store the values that indicate widths of the storage arrays.

4. The CAM device of claim 1 wherein each of the storage arrays has a programmable width configuration.

5. The CAM device of claim 1 wherein each of the storage arrays has a programmable depth configuration.

6. The CAM device of claim 1 further comprising a programmable circuitry to store data-type values, each of the data-type values indicating a type of data to be stored in a respective one of the storage arrays.

7. The CAM device of claim 6 wherein the select circuit is configured to selectively enable the storage arrays to participate in the compare operation based, at least in part, on whether the data-type values meet a data-type criterion conveyed in the search code.

8. The CAM device of claim 1 wherein the plurality of CAM cells within at least one of the storage arrays comprise binary CAM cells.

9. The CAM device of claim 1 wherein the plurality of CAM cells within at least one of the storage arrays comprise ternary CAM cells.

10. The CAM device of claim 1 further comprising match circuits, each match circuit coupled to a respective one of the storage arrays via a plurality of match signal lines and adapted to assert a match signal if the one of the storage arrays is enabled to participate in the compare operation and if a match detection is indicated on at least one of the plurality of match signal lines during the compare operation.

11. The CAM device of claim 1 further comprising multiple-match circuits, each multiple-match circuit being coupled to a respective one of the storage arrays via a plurality of match signal lines and adapted to generate a multiple match signal if the one of the storage arrays is enabled to participate in the compare operation and if a match detection is indicated on at least two of the match signal lines during the compare operation.

12. The CAM device of claim 1 wherein the select circuit is configured to selectively enable each of the storage arrays to participate in the compare operation by selectively enabling a compared value to be driven onto compare lines of the storage array.

13. The CAM device of claim 12 wherein the select circuit comprises circuitry to selectively prevent the compared value from being driven onto the compare lines of one of the storage arrays by setting a plurality of bits within the compared value to a reset state.

14. The CAM device of claim 1 further comprising flag circuits coupled respectively to the storage arrays, each flag circuit being adapted to assert a match flag signal if an entry within the corresponding storage array matches a compared value, and wherein the select circuit is adapted to selectively enable the storage arrays to participate in the compare operation by selectively enabling each of the flag circuits to assert the match flag signal.

15. A method of operation within a content addressable memory (CAM) device, the method comprising:

receiving a search code; and

selectively enabling storage arrays of the CAM device to participate in a compare operation based, at least in part, on whether the storage arrays have a width that meets a width criterion conveyed in the search code.

16. The method of claim 15 further comprising storing a plurality of width configuration values within programmable circuitry of the CAM device, each of the width configuration values establishing the width of a respective one of the storage arrays.

17. The method of claim 16 wherein selectively enabling storage arrays to participate in a compare operation based, at least in part, on whether the storage arrays have a width that meets a width criterion conveyed in the search code comprises selectively enabling the storage arrays to participate in the compare operation based, at least in part, on whether the width configuration values indicate widths that meet the width criterion.

18. The method of claim 15 further comprising storing a plurality of data-type values within programmable circuitry of the CAM device, each of the data-type values indicating a type of data to be stored in a respective one of the storage arrays.

19. The method of claim 18 wherein selectively enabling storage arrays to participate in a compare operation comprises selectively enabling the storage arrays to participate in the compare operation based, at least in part, on whether the data-type values meet a data-type criterion conveyed in the search code.

20. A content addressable memory device comprising:

storage arrays each including a plurality of CAM cells;

means for receiving a search code; and

means for selectively enabling the storage arrays to participate in a compare operation based, at least in part, on whether the storage arrays have a logical width that meets a width criterion conveyed in the search code.