Microelectronic devices and methods for forming interconnects in microelectronic devices

• US 7,232,754 B2
• Filed: 06/29/2004
• Issued: 06/19/2007
• Est. Priority Date: 06/29/2004
• Status: Active Grant

• Current Assignee: Micron Technology, Inc.
• Original Assignee: Micron Technology, Inc.
• Inventors: Farnworth, Warren M., Hembree, David R., Kirby, Kyle K., Rigg, Sidney B., Akram, Salman, Hiatt, William M.
• Primary Examiner(s): Zarneke; David A.
• Application Number:
  US10/879,838
• Publication Number:
  US 20050287783A1
• Time in Patent Office: 1,085 Days
• Field of Search: 438/667
• US Class Current: 438/667
• CPC Class Codes: H01L 21/76898 formed through a semiconductor substrate
• CPC Class Codes: H01L 2224/45015 being circular
• CPC Class Codes: H01L 2224/45099 Material
• CPC Class Codes: H01L 2224/48091 Arched
• CPC Class Codes: H01L 2224/48465 the other connecting portion not on the bonding area being a wedge bond, i.e. ball-to-wedge, regular stitch
• CPC Class Codes: H01L 23/481 Internal lead connections, e.g. via connections, feedthrough structures
• CPC Class Codes: H01L 24/48 of an individual wire connector
• CPC Class Codes: H01L 2924/00 Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
• CPC Class Codes: H01L 2924/00014 the subject-matter covered by the group, the symbol of which is combined with the symbol of this group, being disclosed without further technical details
• CPC Class Codes: H01L 2924/01046 Palladium [Pd]
• CPC Class Codes: H01L 2924/01077 Iridium [Ir]
• CPC Class Codes: H01L 2924/01078 Platinum [Pt]
• CPC Class Codes: H01L 2924/01079 Gold [Au]
• CPC Class Codes: H01L 2924/12042 LASER
• CPC Class Codes: H01L 2924/14 Integrated circuits
• CPC Class Codes: H01L 2924/207 Diameter ranges
• CPC Class Codes: H05K 1/0306 Inorganic insulating substrates, e.g. ceramic, glass
• CPC Class Codes: H05K 2201/0305 Solder used for other purposes than connections between PCB or components, e.g. for filling vias or for programmable patterns
• CPC Class Codes: H05K 2201/09827 Tapered, e.g. tapered hole, via or groove bevelled, chamferred or tapered edge H05K2201/09154
• CPC Class Codes: H05K 2203/072 Electroless plating, e.g. finish plating or initial plating
• CPC Class Codes: H05K 2203/1147 : Sealing or impregnating, e.g. of pores
• CPC Class Codes: H05K 3/4038 : Through-connections; Vertical interconnect access [VIA] connections H05K3/403, H05K3/42 take precedence
• CPC Class Codes: H05K 3/422 : characterised by electroless plating method; pretreatment therefor
• CPC Class Codes: H05K 3/423 : characterised by electroplating method

Abstract

Microelectronic devices, methods for packaging microelectronic devices, and methods for forming interconnects in microelectronic devices are disclosed herein. In one embodiment, a method comprises providing a microelectronic substrate having a front side and a backside. The substrate has a microelectronic die including an integrated circuit and a terminal operatively coupled to the integrated circuit. The method also includes forming a passage at least partially through the substrate and having an opening at the front side and/or backside of the substrate. The method further includes sealing the opening with a conductive cap that closes one end of the passage while another end of the passage remains open. The method then includes filling the passage with a conductive material.

Claims

1. A method of forming an interconnect in a microelectronic device, the method comprising:

providing a microelectronic substrate having a front side, a backside, and a microelectronic die including an integrated circuit and a terminal operatively coupled to the integrated circuit;

forming a passage at least partially through the substrate, the passage having an opening at the front side and/or the backside;

sealing the opening with a conductive cap that closes one end of the passage, wherein another end of the passage remains open; and

filling the passage with a conductive material.

2. The method of claim 1, further comprising applying a dielectric liner to at least a portion of the passage before forming the conductive cap in the passage.

3. The method of claim 1, further comprising:

applying a dielectric liner to at least a portion of the passage before forming the conductive cap in the passage;

positioning a conductive member adjacent to the front side of the substrate and in electrical contact with the conductive cap; and

electrically biasing the conductive cap at a potential with the conductive member to electroplate the conductive material into the passage.

4. The method of claim 1 wherein:

forming the passage comprises forming a via extending completely through the substrate and the terminal; and

sealing the opening comprises forming the cap proximate to the front side of the substrate and in contact with the terminal.

5. The method of claim 1 wherein:

forming the passage comprises forming a blind hole extending from the front side of the workpiece to an intermediate depth within the substrate; and

sealing the opening comprises forming the cap proximate to the front side of the workpiece and in contact with the terminal.

6. The method of claim 1 wherein filling the passage with a conductive material comprises constructing an interconnect through the substrate and in contact with the conductive cap.

7. The method of claim 1 wherein sealing the opening comprises forming a conductive cap by electrolessly plating metal onto the terminal to occlude the opening.

8. The method of claim 1 wherein sealing the opening comprises forming a conductive cap by electrolessly plating Ni onto the terminal to occlude the opening.

9. The method of claim 1 wherein sealing the opening comprises forming a conductive cap by depositing a stud bump in the opening.

10. The method of claim 1 wherein sealing the opening comprises forming a conductive cap by depositing a gold stud bump in the opening.

11. The method of claim 1 wherein sealing the opening comprises forming a conductive cap by depositing an aluminum wedge in the opening.

12. The method of claim 1 wherein sealing the opening comprises forming a conductive cap by (a) depositing a solder cap in the opening, the cap including a solder ball, solder paste, and/or solder preform, and (b) reflowing the solder cap.

13. The method of claim 1 wherein forming the passage comprises laser drilling the passage completely through the substrate and the terminal.

14. A method of forming an interconnect in a microelectronic die, the method comprising:

providing a microelectronic substrate having a front side, a backside, and a microelectronic die including an integrated circuit and a terminal at the front side of the substrate operatively coupled to the integrated circuit;

forming a passage extending completely through the substrate and the terminal, the passage having an opening at the terminal;

forming a conductive cap that occludes the opening and is in electrical contact with the terminal; and

constructing an interconnect in at least a portion of the passage and contacting the conductive cap.

15. The method of claim 14, further comprising applying a dielectric liner to at least a portion of the passage before forming the conductive cap in the passage.

16. The method of claim 14, further comprising applying a dielectric liner to at least a portion of the passage before forming the conductive cap in the passage, and wherein constructing the interconnect comprises:

positioning a conductive member adjacent to the front side of the substrate and in electrical contact with the conductive cap; and

electrically biasing the conductive cap at a potential with the conductive member to electroplate the conductive material into the passage.

17. The method of claim 14 wherein forming the conductive cap comprises electrolessly plating metal onto the terminal to seal a portion of the passage.

18. The method of claim 14 wherein forming the conductive cap comprises electrolessly plating Ni onto the terminal to seal a portion of the passage.

19. The method of claim 14 wherein forming the conductive cap comprises depositing a stud bump to seal a portion of the passage.

20. The method of claim 14 wherein forming the conductive cap comprises depositing a gold stud bump to seal a portion of the passage.

21. The method of claim 14 wherein forming the conductive cap comprises depositing an aluminum wedge to seal a portion of the passage.

22. The method of claim 14 wherein forming the conductive cap comprises depositing a solder ball to seal a portion of the passage.

23. The method of claim 14 wherein constructing the interconnect comprises filling the passage with electrolytic nickel, electrolytic copper, electrolytic solder, electroless nickel, electroless copper, conductive polymer paste, and/or molten solder.

24. A method of forming an interconnect in a microelectronic die, the die including a substrate having a front side and a backside, an integrated circuit, and a terminal at the front side of the substrate operatively coupled to the integrated circuit, the method comprising:

forming a passage extending at least partially through the substrate and the terminal, the passage having an opening at the terminal;

occluding the opening with a conductive cap that is in electrical contact with the terminal; and

depositing a conductive fill material into the passage and in contact with the conductive cap.

25. The method of claim 24, further comprising applying a dielectric liner to at least a portion of the passage before occluding the opening with the conductive cap.

26. The method of claim 24 wherein occluding the opening with the conductive cap comprises using an electroless plating technology to seal a portion of the passage.

27. The method of claim 24 wherein occluding the opening with the conductive cap comprises applying Ni in an electroless plating process to seal a portion of the passage.

28. The method of claim 24 wherein occluding the opening with the conductive cap comprises depositing a stud bump to seal a portion of the passage.

29. The method of claim 24 wherein occluding the opening with the conductive cap comprises depositing a gold stud bump to seal a portion of the passage.

30. The method of claim 24 wherein occluding the opening with the conductive cap comprises depositing an aluminum wedge to seal a portion of the passage.

31. The method of claim 24 wherein occluding the opening with the conductive cap comprises depositing a solder ball to seal a portion of the passage.

32. The method of claim 24 wherein depositing the conductive fill material into the passage comprises filling the passage with electrolytic nickel, electrolytic copper, electrolytic solder, electroless nickel, electroless copper, conductive polymer paste, and/or molten solder.

33. A method of manufacturing a microfeature workpiece having a plurality of microelectronic dies, the individual dies including an integrated circuit and a plurality of terminals operatively coupled to the integrated circuit, the method comprising:

forming a plurality of passages extending completely through each die and each terminal;

forming a conductive cap in corresponding passages proximate to a front side of the workpiece and in electrical contact with corresponding terminals; and

depositing a conductive material into the passages and in contact with the conductive caps.

34. The method of claim 33, further comprising lining the passages with a dielectric liner before forming the conductive caps in the passages.

35. The method of claim 33 wherein depositing the conductive fill material into the passages comprises filling at least a portion of each passage with a conductive material using electroplating technology.

36. The method of claim 33 wherein forming the conductive cap comprises depositing a stud bump in each passage.

37. The method of claim 33 wherein forming the conductive cap comprises depositing a gold stud bump in each passage.

38. The method of claim 33 wherein forming the conductive cap comprises depositing an aluminum wedge in each passage.

39. The method of claim 33 wherein forming the conductive cap comprises depositing a solder ball in each passage.

40. The method of claim 33 wherein forming the conductive cap comprises using an electroless plating technology to seal a first end of each passage.

41. The method of claim 33, further comprising singulating the dies from each other.