Semiconductor device having capacitors for reducing power source noise
First Claim
Patent Images
1. A semiconductor device comprising:
- a BGA substrate having one principal plane furnished with a large number of solder balls, said solder balls constituting a ball grid array;
a semiconductor chip mounted on another principal plane of said BGA substrate, said semiconductor chip being electrically connected to said BGA substrate by metal wires;
chip capacitors mounted on said semiconductor chip to reduce power source noise;
a conductive radiator attached to said another principal plane of said BGA substrate, said conductive radiator covering said semiconductor chip; and
a shield plane incorporated in said BGA substrate, said shield plane constituting a shield of said semiconductor chip in combination with said conductive radiator;
wherein said conductive radiator and said shield plane are connected to ground potential.
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Abstract
A semiconductor device comprises a BGA substrate having one principal plane furnished with a large number of solder balls, the solder balls constituting a ball grid array; a semiconductor chip mounted on another principal plane of the BGA substrate, the semiconductor chip being electrically connected to the BGA substrate by metal wires; and chip capacitors mounted on the semiconductor chip to reduce power source noise.
54 Citations
2 Claims
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1. A semiconductor device comprising:
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a BGA substrate having one principal plane furnished with a large number of solder balls, said solder balls constituting a ball grid array; a semiconductor chip mounted on another principal plane of said BGA substrate, said semiconductor chip being electrically connected to said BGA substrate by metal wires; chip capacitors mounted on said semiconductor chip to reduce power source noise; a conductive radiator attached to said another principal plane of said BGA substrate, said conductive radiator covering said semiconductor chip; and a shield plane incorporated in said BGA substrate, said shield plane constituting a shield of said semiconductor chip in combination with said conductive radiator; wherein said conductive radiator and said shield plane are connected to ground potential. - View Dependent Claims (2)
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Specification