Apparatus and method for transconductance stage with high current response to large signals

• US 7,233,171 B1
• Filed: 06/29/2005
• Issued: 06/19/2007
• Est. Priority Date: 06/29/2005
• Status: Active Grant

• Current Assignee: National Semiconductor Corporation (Texas Instruments, Inc.)
• Original Assignee: National Semiconductor Corporation (Texas Instruments, Inc.)
• Inventors: Chen, Yinming, Shacter, Stuart B.
• Primary Examiner(s): TON, MY TRANG
• Application Number:
  US11/171,957
• Time in Patent Office: 720 Days
• Field of Search: 327/53, 327/66, 327562-563
• US Class Current: 327/53
• CPC Class Codes: H03F 2200/351 Pulse width modulation being used in an amplifying circuit
• CPC Class Codes: H03F 2200/417 A switch coupled in the output circuit of an amplifier being controlled by a circuit
• CPC Class Codes: H03F 2203/45288 Differential amplifier with circuit arrangements to enhance the transconductance
• CPC Class Codes: H03F 2203/45646 the LC comprising an extra current source
• CPC Class Codes: H03F 3/45183 Long tailed pairs H03F3/4521, H03F3/45237 take precedence
• CPC Class Codes: H03F 3/45192 Folded cascode stages

Abstract

A transconductance stage is provided. The transconductance stage includes a tail current source, a differential pair, and two current mirrors. The input to each of the current mirrors is connected to the drain of a separate one of the transistors in the differential pair. The two current mirrors each have two outputs so that one of the outputs can be used to determine whether the output current exceeds a threshold (e.g. nine-tenths of the tail current). If the source current exceeds the threshold, extra source current is switched in to the output so that output source current is increased. Similarly, if the sink current exceeds the threshold, extra sink current is switched in to the output so that the output sink current is increased. This way, the transconductance stage can supply large output currents in response to a large signal input but maintains low quiescent current for small input signals.

Claims

1. A circuit for providing a current response, comprising:

a transconductance circuit that is arranged to provide an output current based at least in part on a differential input voltage, wherein the transconductance circuit is arranged to provide the output current at an output current node, and wherein the transconductance circuit includes;

a differential pair including a first transistor and a second transistor;

a tail current source that is coupled to the differential pair;

a first current mirror circuit having at least an input, a first output, and a second output, wherein the input of the first current mirror circuit is coupled to the first transistor, the first output of the current mirror circuit is coupled to an output current node; and

wherein the first current mirror circuit is arranged to provide a first mirror current at the second output of the first current mirror circuit; and

a first output current boost circuit that is coupled to the second output of the first current mirror, wherein the first output current boost circuit is arranged to trip if the first mirror current reaches a threshold, and further arranged to increase the output current if the output current boost circuit is tripped.

2. The circuit of claim 1, further comprising:

a soft-start circuit;

a plurality of switches that is arranged to;

when the circuit for providing the current response is first enabled, couple the output current node to a soft-start capacitor node until a soft-start voltage at the soft-start capacitor node is substantially equal to a feedback voltage; and

when the soft-start capacitor voltage is substantially equal to the feedback voltage, couple the soft-start circuit to the soft-start capacitor node; and

an error amplifier including a first input that is coupled to the soft-start capacitor node, and a second input that is arranged to receive the feedback voltage, wherein the transconductance circuit includes a first input and a second input, and wherein the first input of the transconductance circuit is coupled to the output current node.

3. The circuit of claim 1, wherein the tail current source is configured to provide a tail current that is relatively independent of the differential input voltage.

4. The circuit of claim 1, wherein the tail current source is configured to provide a tail current, and wherein the threshold is about nine-tenths of the tail current.

5. The circuit of claim 1, wherein

the first output current boost circuit includes:

a first current source circuit; and

a first switch circuit that is configured to trip if the first mirror current reaches the threshold, wherein the first switch circuit is arranged to couple the first current source circuit to the output node if the first switch circuit is tripped, and further arranged to isolate the first current source circuit from the output current node if the first switch circuit is not tripped.

6. The circuit of claim 5, wherein the first output current boost circuit further includes a hysteresis circuit that is coupled to the first switch circuit.

7. The circuit of claim 1, wherein

the first output current boost circuit is arranged to provide a source current to the output current node to increase the output current if the output current boost circuit is tripped;

the transconductance circuit further includes;

a second current mirror circuit having at least an input, a first output, and a second output, wherein the input of the second current mirror circuit is coupled to the second transistor;

the first output of the current mirror circuit is coupled to the output current node; and

wherein the second current mirror circuit is arranged to provide a second mirror current at the second output of the second current mirror circuit; and

a second output current boost circuit that is coupled to the second output of the second current mirror, wherein the second output current boost circuit is arranged to trip if the second mirror current reaches a second threshold, and further arranged to provide a sink current to the output current node if the output current boost circuit is tripped; and

wherein the first output current boost circuit includes;

a first switch circuit that is arranged to trip if the first mirror current reaches the threshold;

a first current source circuit that is arranged to provide a first current source current if the first switch circuit is closed; and

a third current mirror circuit including an input that is arranged to receive the first current source current and an output that is coupled to the output current node.

8. The circuit of claim 7, wherein the first output current boost circuit further includes:

a third transistor that is arranged to operate as a current source if the first mirror current reaches the threshold, and to operate as a pull-down or pull-up device if the first mirror current is less than the threshold, wherein the third transistor is arranged such that the first switch circuit trips if the third transistor operates as a pull-down or pull-up device.

9. The circuit of claim 7, wherein

the second output current boost circuit includes:

a second switch circuit that is arranged to trip if the second mirror current reaches the second threshold; and

a second current source circuit that is arranged to provide a second current source current to the output node if the second switch circuit is closed.

10. A transconductance circuit that is arranged to provide an output current at an output node, comprising:

a differential pair including;

a first transistor having at least a drain, and a second transistor having at least a drain;

a tail current source that is coupled to the differential pair;

a first current mirror circuit having at least an input, a first output, and a second output, wherein the input of the first current mirror circuit is coupled to the drain of the first transistor; and

wherein the first current mirror circuit is arranged to provide a first mirror current at the second output of the first current mirror circuit;

a second current mirror circuit having at least an input, a first output, and a second output, wherein the input of the second current mirror circuit is coupled to the drain of the second transistor;

the second current mirror circuit is arranged to provide a first drain current at the first output of the second current mirror circuit;

the first output of the second current mirror circuit is coupled to the output node; and

wherein the first current mirror circuit is arranged to provide a second mirror current at the second output of the second current mirror circuit;

a third current mirror circuit having at least an input and an output, wherein the input of the third current mirror circuit is coupled to the first output of the first current mirror circuit, the output of the third current mirror circuit is coupled to the output node; and

wherein the third current mirror circuit is arranged to provide a first sink current at the output of the third current mirror circuit;

a first switch circuit that is arranged to trip if the first mirror current reaches a sink threshold;

a first current source circuit that is arranged to provide a second sink current if the first switch circuit is tripped, wherein the first switch circuit is coupled between the first current source circuit and the output node such that, if the first switch circuit is tripped, a total sink current at the output node is substantially given by the first sink circuit plus the second sink circuit;

a second switch circuit that is arranged to trip if the second mirror current reaches a source threshold;

a fourth current mirror circuit having at least an input and an output, wherein the output of the fourth current mirror circuit is coupled to the output node, and wherein the fourth current mirror circuit is configured to provide a second source current at the output of the fourth current mirror circuit; and

a second current source circuit that is arranged to provide a second current source current if the second switch circuit is tripped, wherein the second switch circuit is coupled between the second current source circuit and the output node such that, if the second switch circuit is tripped, a total source current at the output node is substantially given by the first source current plus the second source current.

11. The circuit of claim 10, wherein the transconductance circuit is arranged to operate such that:

if the first switch circuit is not tripped, then the second sink current is approximately zero;

if the second switch circuit is not tripped, then second source current is approximately zero;

if the first and second switch circuits are both not tripped, then a total output current provided by the transconductance circuit at the output node is approximately equal to the first source current minus the first sink current, and the total output current is approximately proportional to a differential input voltage received by the transconductance circuit;

if the first switch circuit is tripped, the total output current is a sink current that is approximately equal to the first sink current plus the second sink current, wherein the second sink current is at least ten times the second source current; and

if the second switch circuit is tripped, the total output current is a source current that is approximately equal to the first source current plus the second source current, wherein the second source current is at least ten times the first source current.

12. The transconductance circuit of claim 10, further comprising:

a third transistor, wherein the first switch circuit has at least a control input that is coupled to the second output of the first current mirror circuit;

the third transistor is coupled between the control input of the first switch circuit and ground; and

wherein the third transistor is arranged to operate as a current source if the first mirror current reaches the sink threshold, and to operate as a pull-down device if the first mirror current is less than the sink threshold such that, if the first mirror current reaches the sink threshold, the third transistor pulls the control input of the first switch circuit substantially to ground, tripping the first switch circuit; and

a fourth transistor, wherein the second switch circuit has at least a control input that is coupled to the second output of the second current mirror circuit;

the fourth transistor is coupled between the control input of the second switch circuit and ground; and

wherein the fourth transistor is arranged to operate as a current source if the mirror current reaches the source threshold, and to operate as a pull-down device if the mirror current is less than the source threshold such that, if the mirror current reaches the source threshold, the fourth transistor pulls the control input of the second switch circuit substantially to ground, tripping the second switch circuit.

13. The transconductance circuit of claim 10, further comprising:

a first current comparator circuit, wherein the first switch circuit has at least a control input; and

wherein the first current comparator circuit has at least;

a first input that is coupled to the second output of the first current mirror circuit, and an output that is coupled to the control input of the first switch circuit; and

a second current comparator circuit, wherein the second switch circuit has at least a control input; and

wherein the second current comparator circuit has at least;

a first input that is coupled to the second output of the second current mirror circuit, and an output that is coupled to the control input of the second switch circuit.

14. The transconductance circuit of claim 10, further comprising:

a first folded cascode bias current source circuit that is coupled to the drain of the first transistor;

a first cascode transistor that is coupled between the drain of the first transistor and the input of the first current mirror circuit;

a second folded cascode bias current source circuit that is coupled to the drain of the second transistor; and

a second cascode transistor that is coupled between the drain of the second transistor and the input of the second current mirror circuit.

15. The transconductance circuit of claim 10, further comprising:

a first source follower that is arranged to receive a first half of a differential input signal, wherein the first transistor further has at least a gate, and wherein the first source follower has at least an output that is coupled to gate of the first transistor; and

a second source follower that is arranged to receive a second half of the differential input signal, wherein the second transistor further has at least a gate, and wherein the second source follower has at least an output that is coupled to gate of the second transistor.

16. The transconductance circuit of claim 10, further comprising:

a first hysteresis circuit, including;

a first inverter, wherein the first and second switch circuits each have at least a control input, and wherein the first inverter has at least;

an input that is coupled to the control input of the first switch circuit, and an output;

a first hysteresis current source circuit; and

a third switch circuit that is coupled between the first hysteresis circuit and the control input of the first switch circuit, where the third switch circuit further has at least a control input that is coupled to the output of the first inverter; and

a second hysteresis circuit, including;

a second inverter including at least;

an input that is coupled to the control input of the second switch circuit, and an output;

a second hysteresis current source circuit; and

a fourth switch circuit that is coupled between the second hysteresis circuit and the control input of the second switch circuit, where the fourth switch circuit further has at least a control input that is coupled to the output of the second inverter.

17. A method for providing a current response, comprising:

providing a tail current to a differential pair, wherein the differential pair includes a first transistor and a second transistor;

providing a first sink current to an output current node based, at least in part, on a drain current of the first transistor;

providing a first source current to the output current node based, at least in part, on a drain current of the second transistor;

determining whether at least one of the first sink current or the first source current exceeds a threshold; and

if the at least one of the first sink current or the first source current exceeds the threshold, switching in an additional current to the output current node increase the magnitude of output current provided at the current output node.

18. The method of claim 17, wherein

determining whether the at least one of the first sink current or the first source current exceeds the threshold includes determining whether the source current exceeds the threshold;

and

wherein determining whether the source current exceeds the threshold includes;

employing a current mirror circuit having at least two outputs to receive the drain current of the second transistor, wherein the first output of the current mirror circuit is employed to provide the first source current, and wherein the second output of the current mirror circuit is employed to provide a mirror current; and

determining whether the mirror current exceeds the threshold.

19. The circuit of claim 18, wherein determining whether the mirror current exceeds the threshold employs hysteresis.

20. The method of claim 18, wherein determining whether the at least one of the first sink current or the first source circuit exceeds the threshold further includes determining whether the sink current exceeds the threshold, and wherein determining whether the sink current exceeds the threshold includes:

employing another current mirror circuit having at least two outputs to receive the drain current of the first transistor, wherein the first output of the other current mirror circuit is employed to provide the first sink current, and wherein the second output of the other current mirror circuit is employed to provide another mirror current; and

determining whether the other mirror current exceeds the threshold.