Method and apparatus for performing DC offset cancellation in a receiver

• US 7,233,780 B2
• Filed: 02/24/2004
• Issued: 06/19/2007
• Est. Priority Date: 11/14/2000
• Status: Expired due to Fees

• Current Assignee: Intel Corporation
• Original Assignee: Intel Corporation
• Inventors: Franca-Neto, Luiz M.
• Primary Examiner(s): Nguyen; Duc M.
• Application Number:
  US10/785,783
• Publication Number:
  US 20040166824A1
• Time in Patent Office: 1,211 Days
• Field of Search: 455/114.2, 455/114.3, 455/63.1, 455/295
• US Class Current: 455/296
• CPC Class Codes: H03F 2200/294 the amplifier being a low noise amplifier [LNA]
• CPC Class Codes: H03F 2200/372 Noise reduction and elimination in amplifier
• CPC Class Codes: H03F 3/45982 by using a feedforward circuit
• CPC Class Codes: H04B 1/30 for homodyne or synchrodyne receivers demodulator circuits H03D1/22

Abstract

An amplification system for reducing DC offset in an input signal uses a low pass filter to isolate a DC component of the input signal. The system then subtracts the DC component from the input signal. In one embodiment, the system includes first and second amplifiers in addition to the low pass filter. The first amplifier amplifies the input signal to generate a first amplified signal at a differential output port of the amplification system. The second amplifier amplifies a low pass filtered version of the input signal to generate a second amplified signal at the differential output port of the amplification system. The outputs of the first and second amplifiers are connected to the differential output port of the amplification system in such a way that the first and second signals combine 180 degrees out of phase at the output port. An automatic gain control circuit is also provided that automatically adjusts the gain of the amplification system without changing a bias level associated with the first and second amplifiers.

Claims

1. A circuit comprising:

a first amplifier to amplify a baseband signal having a DC offset into a first amplified signal;

a low pass filter to filter the baseband signal into a filtered signal;

a second amplifier to amplify the filtered signal into a second amplified signal; and

a coupling between an output of the first amplifier and an output of the second amplifier to subtract the second amplified signal from the first amplified signal to generate an output baseband signal having a reduced DC offset.

2. The circuit of claim 1, further comprising an automatic gain control unit coupled to the coupling to modify a gain of the circuit.

3. The circuit of claim 1, wherein the first amplifier and the second amplifier have substantially the same gain.

4. The circuit of claim 1, wherein:

the first amplifier comprises a differential amplifier having differential output terminals;

the second amplifier comprises a differential amplifier having differential output terminals;

the low pass filter comprises differential input terminals coupled to receive the baseband signal and differential output terminals coupled to differential input terminals of the second amplifier to couple the filtered signal to the second amplifier, the low pass filter to block frequencies outside a small band about DC; and

the differential output terminals of the first amplifier and the second amplifier are coupled together to comprise the coupling to cause the second amplified signal to be subtracted from the first amplified signal at the differential output terminals of the first amplifier and the second amplifier.

5. The circuit of claim 4, wherein the first amplifier and the second amplifier each comprise first and second differential output terminals, the first and second differential output terminals of the second amplifier being cross-coupled to the first and second differential output terminals of the first amplifier to combine the first amplified signal with the second amplified signal that is 180 degrees out of phase with the first amplified signal.

6. A receiver system comprising:

a substantially omnidirectional antenna to receive a wireless signal;

a converter with an input coupled to the antenna to receive the signal to convert the signal into a baseband signal having a DC offset;

a first amplifier unit coupled to the converter to receive the baseband signal, the first amplifier unit comprising;

a first amplifier to amplify the baseband signal into a first amplified signal;

a first low pass filter to filter the baseband signal into a first filtered signal;

a second amplifier to amplify the first filtered signal into a second amplified signal; and

a first coupling between an output of the first amplifier and an output of the second amplifier to subtract the second amplified signal from the first amplified signal to generate a first output baseband signal having a reduced DC offset; and

a signal processing unit coupled to the first amplifier unit to process the first output baseband signal.

7. The receiver system of claim 6, wherein the converter comprises:

a low noise amplifier with an input coupled to the antenna to receive the signal to amplify the signal into an amplified signal;

a mixer coupled to the low noise amplifier to receive the amplified signal at a port; and

a local oscillator to generate a local oscillator signal coupled to a local oscillator port of the mixer, the mixer to down convert the amplified signal into the baseband signal with the local oscillator signal at a baseband port of the mixer, the baseband port of the mixer being coupled to the first amplifier unit.

8. The receiver system of claim 6, further comprising a second amplifier unit coupled in cascade with the first amplifier unit between the first amplifier unit and the signal processing unit to receive the first output baseband signal from the first amplifier unit, the second amplifier unit comprising:

a third amplifier to amplify the first output baseband signal into a third amplified signal;

a second low pass filter to filter the first output baseband signal into a second filtered signal;

a fourth amplifier to amplify the second filtered signal into a fourth amplified signal, the fourth amplified signal having a reduced high frequency content compared to the third amplified signal; and

a second coupling between an output of the third amplifier and an output of the fourth amplifier to subtract the fourth amplified signal from the third amplified signal to generate a second output baseband signal having a reduced DC offset.

9. The receiver system of claim 8, wherein:

the first amplifier and the third amplifier each comprise a differential amplifier having differential output terminals;

the second amplifier and the fourth amplifier each comprise a differential amplifier having differential output terminals;

the first low pass filter and the second low pass filter each comprise differential input terminals coupled to receive a differential signal and differential output terminals to carry a differential signal, each of the first low pass filter and the second low pass filter further comprise first and second shunt capacitors and first and second series resistors, the first shunt capacitor being connected between a first node on a first differential line and a ground node and the second shunt capacitor being connected between a second node on a second differential line and the ground node, the first series resistor being connected between an input node on the first differential line and the first node and the second series resistor being connected between an input node on the second differential line and the second node to block frequencies outside a small band about DC;

the differential output terminals of the first amplifier and the second amplifier are cross-coupled to each other to comprise the first coupling of the first amplifier unit to combine the first amplified signal with the second amplified signal that is 180 degrees out of phase with the first amplified signal; and

the differential output terminals of the third amplifier and the fourth amplifier are cross-coupled to each other to comprise the second coupling of the second amplifier unit to combine the third amplified signal with the fourth amplified signal that is 180 degrees out of phase with the third amplified signal.

10. The receiver system of claim 8, wherein:

the first amplifier and the second amplifier are matched to have substantially the same gain; and

the third amplifier and the fourth amplifier are matched to have substantially the same gain.

11. The receiver system of claim 8, wherein the first amplifier, the second amplifier, the third amplifier, the fourth amplifier, the first low pass filter, and the second low pass filter each comprise CMOS transistors.

12. The receiver system of claim 8, further comprising:

a first automatic gain control circuit comprising a first variable impedance device connected between the first and second differential output terminals of the first amplifier unit, the first variable impedance device comprising a transistor, a peak detector, a comparator, amplifiers, and a capacitor coupled together to automatically adjust a gain of the first amplifier unit without changing a bias level of the first and second amplifiers; and

a second automatic gain control circuit comprising a second variable impedance device connected between the first and second differential output terminals of the second amplifier unit, the second variable impedance device comprising a transistor, a peak detector, a comparator, amplifiers, and a capacitor coupled together to automatically adjust a gain of the second amplifier unit without changing a bias level of the third and fourth amplifiers.

13. An amplification system to reduce DC offset in a signal, comprising:

first and second differential input terminals;

first and second differential output terminals;

a first differential amplifier coupled between the first and second differential input terminals and the first and second differential output terminals to amplify a signal received at the first and second differential input terminals to generate a first amplified differential signal at the first and second differential output terminals;

a differential low pass filter coupled to the first and second differential input terminals to filter the signal received at the first and second differential input terminals to generate a filtered differential signal at an output port of the differential low pass filter; and

a coupling between first and second differential output terminals and the output port of the differential low pass filter to cause the filtered differential signal and the first amplified differential signal to subtract at the first and second differential output terminals.

14. The amplification system of claim 13, further comprising:

a second differential amplifier coupled between the output port of the differential low pass filter and the first and second differential output terminals to amplify the filtered differential signal to generate a second amplified differential signal; and

wherein the coupling comprises a coupling between the second differential amplifier and the first and second differential output terminals in a manner that causes the first amplified differential signal and the second amplified differential signal to subtract at the first and second differential output terminals.

15. The amplification system of claim 14, wherein the first differential amplifier and the second differential amplifier are matched to have substantially the same gain.

16. The amplification system of claim 14, wherein first and second differential output lines of the second differential amplifier are cross-coupled to the first and second differential output terminals to comprise the coupling to combine the first amplified differential signal and the second amplified differential signal that is 180 degrees out of phase with the first amplified differential signal.

17. The amplification system of claim 14, further comprising an automatic gain control circuit comprising a variable impedance device connected between the first and second differential output terminals to change an impedance between the first and second differential output terminals based on a signal level on at least one of the first and second differential output terminals to adjust a gain of the amplification system without changing a bias level of the first differential amplifier and the second differential amplifier.

18. The amplification system of claim 14, wherein the first differential amplifier, the second differential amplifier, and the differential low pass filter are comprised of CMOS structures.

19. The amplification system of claim 13, wherein the differential low pass filter comprises first and second shunt capacitors, the first shunt capacitor being connected between a first node on a first differential line of the differential low pass filter and a ground node and the second shunt capacitor being connected between a second node on a second differential line of the differential low pass filter and the ground node, the differential low pass filter further comprising first and second series resistors, the first series resistor being connected between an input node on the first differential line of the differential low pass filter and the first node and the second series resistor being connected between an input node on the second differential line of the differential low pass filter and the second node to block frequencies outside a small band about DC.