Substrates having increased thermal conductivity for semiconductor structures

• US 7,235,430 B2
• Filed: 03/30/2004
• Issued: 06/26/2007
• Est. Priority Date: 10/02/2001
• Status: Expired due to Fees

• Current Assignee: Xerox Corporation (Xerox Holdings Corp.)
• Original Assignee: Xerox Corporation (Xerox Holdings Corp.)
• Inventors: Romano, Linda T., Northrup, John E., Kneissl, Michael A.
• Primary Examiner(s): LOUIE, WAI SING
• Application Number:
  US10/812,035
• Publication Number:
  US 20040180470A1
• Time in Patent Office: 1,183 Days
• Field of Search: 438/459, 438997-998
• US Class Current: 438/122
• CPC Class Codes: B82Y 20/00 Nanooptics, e.g. quantum optics or photonic crystals
• CPC Class Codes: H01L 2224/32 of an individual layer connector
• CPC Class Codes: H01L 23/3677 Wire-like or pin-like cooling fins or heat sinks
• CPC Class Codes: H01L 27/15 including semiconductor components having potential barriers, specially adapted for light emission
• CPC Class Codes: H01L 29/0657 characterised by the shape of the body
• CPC Class Codes: H01L 2924/10158 at the passive surface
• CPC Class Codes: H01L 33/642 characterized by the shape
• CPC Class Codes: H01S 5/0202 Cleaving
• CPC Class Codes: H01S 5/0207 Substrates having a special shape
• CPC Class Codes: H01S 5/0213 Sapphire, quartz or diamond based substrates
• CPC Class Codes: H01S 5/02461 Structure or details of the laser chip to manipulate the heat flow, e.g. passive layers in the chip with a low heat conductivity
• CPC Class Codes: H01S 5/02469 Passive cooling, e.g. where heat is removed by the housing as a whole or by a heat pipe without any active cooling element like a TEC
• CPC Class Codes: H01S 5/02484 Sapphire or diamond heat spreaders
• CPC Class Codes: H01S 5/026 Monolithically integrated components, e.g. waveguides, monitoring photo-detectors, drivers stabilisation of output H01S5/06
• CPC Class Codes: H01S 5/04257 having positive and negative electrodes on the same side of the substrate
• CPC Class Codes: H01S 5/34333 with a well layer based on Ga(In)N or Ga(In)P, e.g. blue laser
• CPC Class Codes: H01S 5/4031 Edge-emitting structures

Abstract

Substrates having increased thermal conductivity are provided, comprising a body having opposed surfaces and a cavity that opens on at least one surface, the cavity containing at least one material having a greater thermal conductivity than the body. Devices are provided comprising a substrate and a semiconductor over a surface of the substrate. Methods of forming devices according to the invention are also provided.

Claims

1. A method of forming a semiconductor device with increased thermal conductivity, comprising:

forming a cavity having a length, width and thickness in a body of a sapphire substrate having relatively low thermal conductivity by ablating the body with a laser, the body having a thickness, a bottom surface and a top surface, the cavity opening onto at least the bottom surface;

substantially filling the cavity with at least one material having a greater thermal conductivity than the body; and

forming a semiconductor structure over the top surface and over the cavity,

wherein at least one of the length and width of the cavity is substantially equal to or greater than the corresponding length and width of the semiconductor structure to provide a heat path for transporting heat away from the semiconductor structure that increases the thermal conductivity of the semiconductor device.

2. The method of claim 1, wherein forming the cavity comprises ablating the body with an Nd:

YAG laser.

3. The method of claim 1, wherein forming the cavity comprises ablating the body with a laser having a spot size of at least about 20 μ

m.

4. The method of claim 1, wherein forming the semiconductor comprises forming a GaN semiconductor structure.

5. The method of claim 1 wherein at least partially filling the cavity comprises at least partially filling the cavity with at least one of a seed layer, Au, Ag or Cu.

6. The method of claim 1, wherein at least partially filling the cavity comprises:

forming a seed layer on at least a portion of the inner surface of the cavity; and

forming an additional at least one material layer in the cavity over the seed layers.

7. The method of claim 6, wherein forming an additional at least one material layer comprises plating the additional at least one material onto the seed layer.

8. The method of claim 1, wherein at least partially filling the cavity comprises at least partially filling the cavity with a metal paste.

9. The method of claim 1, wherein forming the semiconductor occurs after forming the cavity.

10. The method of claim 9, wherein:

forming the cavity comprises forming the cavity to a depth that is less than the thickness of the body so that the cavity opens onto the bottom surface without opening onto the top surface.

11. The method of claim 1, wherein forming the cavity comprises forming at least a first portion having a first depth that is less than the thickness of the body and a second portion within the body having a second depth that is equal to the thickness of the body and greater than the first depth, the first portion having at least one of a width and a length that is greater than the second portion.

12. The method of claim 1, wherein forming the semiconductor occurs prior to forming the cavity.

13. The method of claim 12, wherein:

forming the cavity comprises forming the cavity to a depth that is equal to the thickness of the body so that the cavity opens onto the bottom surface and the top surface;

at least partially filling the cavity comprises at least partially filling the cavity so that the at least one material contacts the semiconductor.

14. The method of claim 12, wherein:

forming the cavity comprises forming at least a first portion having a first depth that is less than the thickness of the body and a second portion within the body having a second depth that is equal to the thickness of the body, so that the cavity opens onto the bottom surface and the top surface, the second portion having at least one of a width and a length that is greater than the first portion; and

at least partially filling the cavity comprises at least partially filling the cavity so that the at least one material contacts the semiconductor.

15. The method of claim 1, wherein the semiconductor structure includes at least one p-contact.

16. The method of claim 15, wherein the length of the cavity is aligned with the at least one p-contact.

17. The method of claim 1, wherein the cavity is filled to maximize thermal conductivity and structural rigidity of the semiconductor device.

18. The method of claim 1, wherein forming the cavity comprises ablating the body with a laser having a wavelength of about 1 μ

m.

20. The method of claim 1, wherein the body thickness is at least about 100 μ

m.

19. A method of forming a semiconductor device with increased thermal conductivity, comprising:

forming a cavity in a body of a sapphire substrate having relatively low thermal conductivity, the body having a thickness, a bottom surface and a top surface, the cavity opening onto the bottom surface, wherein forming the cavity comprises ablating the body with a laser;

substantially filling the cavity with at least one material having a greater thermal conductivity than the body; and

forming a heat generating semiconductor structure over the top surface,

wherein the cavity is formed to a depth that is less than the thickness of the body so that the cavity opens onto the bottom surface without opening onto the top surface, the cavity forming a heat path that transports heat from the semiconductor structure away from the substrate.