Lanthanum hafnium oxide dielectrics

• US 7,235,501 B2
• Filed: 12/13/2004
• Issued: 06/26/2007
• Est. Priority Date: 12/13/2004
• Status: Active Grant

• Current Assignee: Micron Technology, Inc.
• Original Assignee: Micron Technology, Inc.
• Inventors: Ahn, Kie Y., Forbes, Leonard
• Primary Examiner(s): LE, DUNG ANH
• Application Number:
  US11/010,529
• Publication Number:
  US 20060128168A1
• Time in Patent Office: 925 Days
• Field of Search: 438/778
• US Class Current: 438/785
• CPC Class Codes: C23C 16/40 Oxides
• CPC Class Codes: C23C 16/45531 specially adapted for making ternary or higher compositions
• CPC Class Codes: C23C 16/45553 characterized by the use of precursors specially adapted for ALD
• CPC Class Codes: H01L 21/02181 the material containing hafnium, e.g. HfO2
• CPC Class Codes: H01L 21/02194 the material containing more than one metal element
• CPC Class Codes: H01L 21/022 the layer being a laminate, i.e. composed of sublayers, e.g. stacks of alternating high-k metal oxides adhesion layers or buffer layers H01L21/02304, H01L21/02362
• CPC Class Codes: H01L 21/0228 deposition by cyclic CVD, e.g. ALD, ALE, pulsed CVD
• CPC Class Codes: H01L 21/3141 Deposition using atomic layer deposition techniques [ALD]
• CPC Class Codes: H01L 21/31645 Deposition of Hafnium oxides, e.g. HfO2
• CPC Class Codes: H01L 2924/00 Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
• CPC Class Codes: H01L 2924/0002 Not covered by any one of groups H01L24/00, H01L24/00 and H01L2224/00

Abstract

Dielectric layers containing a lanthanum hafnium oxide layer, where the lanthanum hafnium oxide layer is formed as a structure of one or more monolayers, and methods of fabricating such dielectric layers provide an insulating layer in a variety of structures for use in a wide range of electronic devices.

Claims

1. A method comprising:

forming a dielectric layer containing a lanthanum hafnium oxide layer, the lanthanum hafnium oxide layer formed using atomic layer deposition, wherein forming the lanthanum hafnium oxide layer using atomic layer deposition includes;

introducing a lanthanum-containing precursor to a substrate, introducing the lanthanum-containing precursor including pulsing at least one of a trisethylcyclopentadionatolanthanum precursor or a trisdipyvaloylmethanatolanthanum precursor; and

introducing a hafnium-containing precursor to the substrate.

2. The method of claim 1, wherein forming a dielectric layer containing a lanthanum hafnium oxide layer includes forming the lanthanum hafnium oxide layer on a silicon oxide layer to form the dielectric layer as a dielectric stack.

3. The method of claim 1, wherein the method includes forming the dielectric layer as a gate insulator of a transistor in the integrated circuit.

4. The method of claim 1, wherein the method includes forming the dielectric layer as a gate insulator in a CMOS transistor in the integrated circuit.

5. The method of claim 1, wherein the method includes forming the dielectric layer as a dielectric of a capacitor in a dynamic random access memory.

6. The method of claim 1, wherein forming the dielectric layer includes forming the dielectric layer as a nanolaminate having the lanthanum hafnium oxide layer.

7. The method of claim 1, wherein forming the dielectric layer includes forming the dielectric layer as a nanolaminate having the lanthanum hafnium oxide layer and a lanthanide oxide layer.

8. The method of claim 1, wherein forming the dielectric layer includes forming the dielectric layer as a nanolaminate having the lanthanum hafnium oxide layer and a hafnium oxide layer.

9. The method of claim 1, wherein the method includes forming a transistor.

10. The method of claim 1, wherein the method includes forming a capacitor.

11. The method of claim 10, wherein forming a capacitor includes forming the dielectric layer as a dielectric of the capacitor formed in an analog integrated circuit.

12. The method of claim 10, wherein forming a capacitor includes forming the dielectric layer as a dielectric of the capacitor formed in a radio frequency integrated circuit.

13. The method of claim 10, wherein forming a capacitor includes forming the dielectric layer as a dielectric of the capacitor formed in a mixed signal integrated circuit.

14. The method of claim 1, wherein the method is a method of forming a memory device.

15. The method of claim 1, wherein the method is a method of forming an electronic system.

16. The method of claim 1, wherein introducing the lanthanum-containing precursor to a substrate and introducing a hafnium-containing precursor to the substrate are performed in a common atomic layer deposition cycle to form lanthanum hafnium oxide.

17. The method of claim 1, wherein introducing the lanthanum-containing precursor to a substrate and introducing a hafnium-containing precursor to the substrate are performed in different sequences in a common atomic layer deposition cycle to form lanthanum hafnium oxide.

18. The method of claim 1, wherein introducing the lanthanum-containing precursor to a substrate is performed in a lanthanum sequence, introducing a hafnium-containing precursor to the substrate is performed in a hafnium sequence, and an atomic layer deposition cycle to form lanthanum hafnium oxide includes a number of lanthanum sequences and a number of hafnium sequences with the number of lanthanum sequences different from the number of hafnium sequences.

19. A method comprising:

forming a dielectric layer containing a lanthanum hafnium oxide layer in an integrated circuit, the lanthanum hafnium oxide layer arranged as one or more monolayers, wherein forming the lanthanum hafnium oxide layer includes;

introducing a lanthanum-containing precursor to a substrate, wherein introducing the lanthanum-containing precursor includes pulsing at least one of a trisethylcyclopentadionatolanthanum precursor or a trisdipyvaloylmethanatolanthanum precursor; and

introducing a hafnium-containing precursor to the substrate.

20. The method of claim 19, wherein forming the lanthanum hafnium oxide layer includes forming the lanthanum hafnium oxide by a self-limiting mechanism.

21. The method of claim 19, wherein introducing the lanthanum-containing precursor to a substrate and introducing a hafnium-containing precursor to the substrate are performed prior to introducing an oxidizing reactant precursor.

22. A method comprising:

forming a dielectric layer containing a lanthanum hafnium oxide layer in an integrated circuit, the lanthanum hafnium oxide layer arranged as one or more monolayers, wherein forming the lanthanum hafnium oxide layer includes;

introducing a lanthanum-containing precursor to a substrate, wherein introducing the lanthanum-containing precursor includes pulsing a La(C₁₁H₁₉O₂)₃CH₃(OCH₂CH₂)₄OCH₃ precursor; and

introducing a hafnium-containing precursor to the substrate.

23. The method of claim 22, wherein forming the lanthanum hafnium oxide layer includes forming the lanthanum hafnium oxide by a self-limiting mechanism.

24. The method of claim 22, wherein the method includes forming the dielectric layer to include a layer of HfO₂, a layer of La₂O₃, or layers of HfO₂ and La₂O₃.

25. A method comprising:

forming a dielectric layer containing a lanthanum hafnium oxide layer in an integrated circuit, the lanthanum hafnium oxide layer arranged as one or more monolayers, wherein forming the lanthanum hafnium oxide layer includes;

introducing a lanthanum-containing precursor to a substrate, wherein introducing the lanthanum-containing precursor includes pulsing a La(C₁₁H₁₉O₂)₃ precursor; and

introducing a hafnium-containing precursor to the substrate.

26. The method of claim 25, wherein forming the lanthanum hafnium oxide layer includes forming the lanthanum hafnium oxide by a self-limiting mechanism.

27. The method of claim 25, wherein the method includes doping the lanthanum hafnium oxide layer with a lanthanide other than lanthanum.

28. A method comprising:

forming a memory array in a substrate including forming a dielectric layer containing a lanthanum hafnium oxide layer, the lanthanum hafnium oxide layer formed using atomic layer deposition, wherein forming the lanthanum hafnium oxide layer using atomic layer deposition includes;

pulsing a lanthanum-containing precursor to a substrate, pulsing the lanthanum-containing precursor includes pulsing at least one of a trisethylcyclopentadionatolanthanum precursor or a trisdipyvaloylmethanatolanthanum precursor; and

pulsing a hafnium-containing precursor to the substrate; and

forming a connection to couple the memory array to a bus.

29. The method of claim 28, wherein pulsing a hafnium-containing precursor includes a hafnium halide precursor.

30. The method of claim 28, wherein the method is a method of forming a memory device including forming the dielectric layer as a gate insulator of a transistor in the memory device.

31. The method of claim 28, wherein the method is a method of forming a flash memory device including forming the dielectric layer as an inter-gate insulator of a floating gate transistor in the flash memory device.

32. The method of claim 28, wherein the method is a method of forming a memory device including forming the dielectric layer as a dielectric of a capacitor in the memory device.

33. The method of claim 28, wherein the method is a method of forming a dynamic random access memory.

34. The method of claim 28, wherein introducing the lanthanum-containing precursor to a substrate and introducing a hafnium-containing precursor to the substrate are performed in a common atomic layer deposition cycle to form lanthanum hafnium oxide.

35. The method of claim 28, wherein introducing the lanthanum-containing precursor to a substrate and introducing a hafnium-containing precursor to the substrate are performed in different sequences in a common atomic layer deposition cycle to form lanthanum hafnium oxide.

36. A method comprising:

forming a memory array in a substrate including forming a dielectric layer containing a lanthanum hafnium oxide layer in an integrated circuit, the lanthanum hafnium oxide layer arranged as one or more monolayers, wherein forming the lanthanum hafnium oxide layer includes;

pulsing a lanthanum-containing precursor to a substrate, wherein pulsing the lanthanum-containing precursor includes pulsing at least one of a trisethylcyclopentadionatolanthanum precursor or a trisdipyvaloylmethanatolanthanum precursor; and

pulsing a hafnium-containing precursor to the substrate; and

forming a connection to couple the memory array to a bus.

37. The method of claim 36, wherein forming the lanthanum hafnium oxide layer includes forming the lanthanum hafnium oxide by a self-limiting mechanism.

38. The method of claim 36, wherein the method includes forming the dielectric layer as a nanolaminate dielectric in a NROM flash memory.

39. A method comprising:

forming a memory array in a substrate including forming a dielectric layer containing a lanthanum hafnium oxide layer in an integrated circuit, the lanthanum hafnium oxide layer arranged as one or more monolayers, wherein forming the lanthanum hafnium oxide layer includes;

pulsing a lanthanum-containing precursor to a substrate, wherein pulsing the lanthanum-containing precursor includes pulsing a La(C₁₁H₁₉O₂)₃CH₃(OCH₂CH₂)₄OCH₃ precursor; and

pulsing a hafnium-containing precursor to the substrate; and

forming a connection to couple the memory array to a bus.

40. The method of claim 39, wherein forming the lanthanum hafnium oxide layer includes forming the lanthanum hafnium oxide by a self-limiting mechanism.

41. The method of claim 39, wherein forming the lanthanum hafnium oxide layer includes forming La₂Hf₂O₇.

42. A method comprising:

providing a controller;

coupling an integrated circuit to the controller, wherein at least one of the integrated circuit or the controller includes a dielectric layer containing a lanthanum hafnium oxide layer, the lanthanum hafnium oxide layer formed using atomic layer deposition, wherein forming the lanthanum hafnium oxide layer using atomic layer deposition includes;

pulsing a lanthanum-containing precursor onto a substrate, pulsing the lanthanum-containing precursor including pulsing at least one of a trisethylcyclopentadionatolanthanum precursor or a trisdipyvaloylmethanatolanthanum precursor; and

pulsing a hafnium-containing precursor onto the substrate.

43. The method of claim 42, wherein pulsing a hafnium-containing precursor includes pulsing a hafnium nitrate precursor.

44. The method of claim 42, wherein coupling an integrated circuit to the controller includes coupling a memory device as the integrated circuit.

45. The method of claim 42, wherein forming the dielectric layer includes forming the dielectric layer as a nanolaminate having the lanthanum hafnium oxide layer.

46. The method of claim 42, wherein forming the dielectric layer includes forming the dielectric layer as a nanolaminate having the lanthanum hafnium oxide layer and a lanthanide oxide layer.

47. The method of claim 42, wherein forming the dielectric layer includes forming the dielectric layer as a nanolaminate having the lanthanum hafnium oxide layer and a hafnium oxide layer.

48. The method of claim 42, wherein providing a controller includes providing a processor.

49. The method of claim 42, wherein coupling an integrated circuit to the controller includes coupling a mixed signal integrated circuit as the integrated circuit.

50. The method of claim 42, wherein the method includes forming an information handling system.

51. The method of claim 42, wherein introducing the lanthanum-containing precursor to a substrate and introducing a hafnium-containing precursor to the substrate are performed in a common atomic layer deposition cycle to form lanthanum hafnium oxide.

52. The method of claim 42, wherein introducing the lanthanum-containing precursor to a substrate and introducing a hafnium-containing precursor to the substrate are performed in different sequences in a common atomic layer deposition cycle to form lanthanum hafnium oxide.

53. A method comprising:

providing a controller;

coupling an integrated circuit to the controller, wherein at least one of the integrated circuit or the controller includes a dielectric layer containing a lanthanum hafnium oxide layer, the lanthanum hafnium oxide layer arranged as one or more monolayers, wherein forming the lanthanum hafnium oxide layer includes;

pulsing a lanthanum-containing precursor onto a substrate, wherein pulsing the lanthanum-containing precursor includes pulsing at least one of a trisethylcyclopentadionatolanthanum precursor or a trisdipyvaloylmethanatolanthanum precursor; and

pulsing a hafnium-containing precursor onto the substrate.

54. The method of claim 53, wherein forming the lanthanum hafnium oxide layer includes forming the lanthanum hafnium oxide by a self-limiting mechanism.

55. The method of claim 53, wherein the method includes forming a wireless system.

56. A method comprising:

providing a controller;

coupling an integrated circuit to the controller, wherein at least one of the integrated circuit or the controller includes a dielectric layer containing a lanthanum hafnium oxide layer, the lanthanum hafnium oxide layer arranged as one or more monolavers, wherein forming the lanthanum hafnium oxide layer includes;

pulsing a lanthanum-containing precursor onto a substrate, wherein pulsing the lanthanum-containing precursor includes pulsing a La(C₁₁H₁₉O₂)₃CH₃(OCH₂CH₂)₄OCH₃ precursor; and

pulsing a hafnium-containing precursor onto the substrate.

57. The method of claim 56, wherein forming the lanthanum hafnium oxide layer includes forming the lanthanum hafnium oxide by a self-limiting mechanism.

58. The method of claim 56, wherein the method includes forming an electro-optic system.