One terminal capacitor interface circuit
First Claim
1. A one terminal capacitor interface circuit for sensing the capacitance of a capacitor comprising:
- a differential integrating amplifier having an input common mode voltage and two summing nodes whose voltage is substantially equal to said input common mode voltage;
a switching circuit for charging said capacitor to a first voltage level in a first phase, connecting, in a second phase, said capacitor to one of said summing nodes of said differential amplifier to provide a first output change substantially representative of the difference between said first voltage level and said input common mode voltage, and also representative of said capacitor;
charging said capacitor to a second voltage level in a third phase, and connecting, in a fourth phase, said capacitor to the other summing node of said differential amplifier to provide a second output change substantially representative of the difference between said second voltage level and said input common mode voltage, and also representative of said capacitor;
the combined first and second output changes representing the capacitance of said capacitor substantially independent of said input common mode voltage.
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Accused Products
Abstract
A one terminal capacitor interface circuit for sensing the capacitance of a capacitor includes a differential integrating amplifier having an input common mode voltage and two summing nodes whose voltage is substantially equal to the input common mode voltage, a switching circuit for charging the capacitor to a first voltage level in a first phase, connecting, in a second phase, the capacitor to one of the summing nodes of the differential amplifier to provide a first output change substantially representative of the difference between the first voltage level and the input common mode voltage, and also representative of the capacitor; charging the capacitor to a second voltage level in a third phase, and connecting, in a fourth phase, the capacitor to the other summing node of the differential amplifier to provide a second output change substantially representative of the difference between the second voltage level and the input common mode voltage, and also representative of the capacitor; the combined first and second output changes representing the capacitance of the capacitor substantially independent of the input common mode voltage.
63 Citations
16 Claims
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1. A one terminal capacitor interface circuit for sensing the capacitance of a capacitor comprising:
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a differential integrating amplifier having an input common mode voltage and two summing nodes whose voltage is substantially equal to said input common mode voltage; a switching circuit for charging said capacitor to a first voltage level in a first phase, connecting, in a second phase, said capacitor to one of said summing nodes of said differential amplifier to provide a first output change substantially representative of the difference between said first voltage level and said input common mode voltage, and also representative of said capacitor;
charging said capacitor to a second voltage level in a third phase, and connecting, in a fourth phase, said capacitor to the other summing node of said differential amplifier to provide a second output change substantially representative of the difference between said second voltage level and said input common mode voltage, and also representative of said capacitor;
the combined first and second output changes representing the capacitance of said capacitor substantially independent of said input common mode voltage. - View Dependent Claims (2, 3, 4, 5)
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6. A capacitance to voltage converter circuit for sensing the capacitance of a one terminal capacitor comprising:
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a differential integrating amplifier having an input common mode voltage and two summing nodes whose voltage is substantially equal to said input common mode voltage; a switching circuit for charging said capacitor to a first voltage level in a first phase, connecting, in a second phase, said capacitor to one of said summing nodes of said differential amplifier to provide a first output change substantially representative of the difference between said first voltage level and said input common mode voltage; and
also representative of said capacitor;
charging said capacitor to a second voltage level in a third phase, and connecting, in a fourth phase, said capacitor to the other summing node of said differential amplifier to provide a second output change substantially representative of the difference between said second voltage level and said input common mode voltage, and also representative of said capacitor;
the combined first and second output changes representing the capacitance of said capacitor substantially independent of said input common mode voltage, anda reset switching circuit for resetting the differential integrating amplifier. - View Dependent Claims (7, 8, 9, 10)
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11. A capacitive input sigma delta modulator for sensing the capacitance of a one terminal capacitor comprising:
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at least one integrating stage, a quantizer and a digital to analog converter having positive and negative reference voltage, the first integrating stage including a differential integrating amplifier having an input common mode voltage and two summing nodes whose voltage is substantially equal to said input common mode voltage; a switching circuit for charging said capacitor to a first voltage level in a first phase, connecting, in a second phase, said capacitor to one of said summing nodes of said differential amplifier to provide a first output change substantially representative of the difference between said first voltage level and said input common mode voltage, and also representative of said capacitor;
charging said capacitor to a second voltage level in a third phase, and connecting, in a fourth phase, said capacitor to the other summing node of said differential amplifier to provide a second output change substantially representative of the difference between said second voltage level and said input common mode voltage, and also representative of said capacitor;
the combined first and second output changes representing the capacitance of said capacitor substantially independent of said input common mode voltage. - View Dependent Claims (12, 13, 14, 15, 16)
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Specification