Fast-path apparatus for receiving data corresponding a TCP connection

• US 7,237,036 B2
• Filed: 09/27/2002
• Issued: 06/26/2007
• Est. Priority Date: 10/14/1997
• Status: Expired due to Term

• Current Assignee: Alacritech, Inc.
• Original Assignee: Alacritech, Inc.
• Inventors: Higgen, David A., Philbrick, Clive M., Boucher, Laurence B., Craft, Peter K., Blightman, Stephen E. J., Starr, Daryl D.
• Primary Examiner(s): Pwu; Jeffrey
• Assistant Examiner(s): Jean-Gilles; Jude
• Application Number:
  US10/260,112
• Publication Number:
  US 20040073703A1
• Time in Patent Office: 1,733 Days
• Field of Search: 709/245, 709/236, 709/230, 709/202, 370/474, 370/230, 370/396, 370/469, 707 2- 4, 707/10, 712/19, 712/52
• US Class Current: 709/245
• CPC Class Codes: G06F 13/385 for adaptation of a particular data processing system to different peripheral devices
• CPC Class Codes: H04L 69/12 Protocol engines
• CPC Class Codes: H04L 69/16 Implementation or adaptation of Internet protocol [IP], of transmission control protocol [TCP] or of user datagram protocol [UDP]
• CPC Class Codes: H04L 69/161 Implementation details of TCP/IP or UDP/IP stack architecture; Specification of modified or new header fields
• CPC Class Codes: H04L 69/22 Parsing or analysis of headers

Abstract

A system for protocol processing in a computer network has an intelligent network interface card (INIC) or communication processing device (CPD) associated with a host computer. The INIC provides a fast-path that avoids protocol processing for most large multi-packet messages, greatly accelerating data communication. The INIC also assists the host for those message packets that are chosen for processing by host software layers. A communication control block for a message is defined that allows DMA controllers of the INIC to move data, free of headers, directly to or from a destination or source in the host. The context is stored in the INIC as a communication control block (CCB) that can be passed back to the host for message processing by the host. The INIC contains specialized hardware circuits that are much faster at their specific tasks than a general purpose CPU. A preferred embodiment includes a trio of pipelined processors with separate processors devoted to transmit, receive and management processing, with full duplex communication for four fast Ethernet nodes.

Claims

1. A device for use with a first apparatus that is connectable to a second apparatus, the first apparatus containing a memory and a first processor operating a stack of protocol processing layers that create a context for communication, the context including a media access control (MAC) layer address, an Internet Protocol (IP) address and Transmission Control Protocol (TCP) state information, the device comprising:

a communication processing mechanism connected to the first processor, said communication processing mechanism containing a second processor running instructions to process a message packet such that the context is employed to transfer data contained in said packet to the first apparatus memory and the TCP state information is updated by said second processor.

2. The device of claim 1, wherein said communication processing mechanism includes a receive sequencer with directions to classify said packet, wherein said packet contains control information corresponding to the stack of protocol layers.

3. The device of claim 1, wherein said communication processing mechanism includes a receive sequencer with directions to generate a summary of a second message packet received from the network, said second packet containing control information corresponding to the stack of protocol layers, and said instructions including an instruction to compare said summary with said context.

4. The device of claim 1, wherein said instructions include a first instruction to create a header corresponding to said context and having control information corresponding to several of the protocol processing layers, and said instructions include a second instruction to prepend said header to second data for transmission of a second packet.

5. The device of claim 1, wherein said communication processing mechanism has a direct memory access unit to send, based upon said context, said data from said communication processing mechanism to the first apparatus memory, without a header accompanying said data.

6. The device of claim 1, wherein said context includes a receive window of space in the memory that is available to store application data, and said communication processing mechanism advertises said receive window.

7. The device of claim 1, wherein said context includes TCP ports of said first and said second apparatuses.

8. The device of claim 1, wherein said context is transferred from said first processor to said communication processing mechanism.

9. A device for use with a first apparatus that can communicate with a second apparatus, the first apparatus containing a first processor operating a stack of protocol processing layers that create a Transmission Control Protocol (TCP) connection for communication between a first application on the first apparatus and a second application on the second apparatus, the device comprising:

a receive mechanism having logic to classify a message packet received from the second apparatus by the device, said message packet containing data and a header with control information corresponding to several of said protocol layers, said logic including directions to create a descriptor of said packet, and

a second processor coupled to said receive mechanism and to the first apparatus, having instructions to compare said descriptor with the TCP connection and to choose whether to send said message packet to the stack for protocol processing or to update said TCP connection and send said data directly to the first application without processing said message packet by the stack.

10. The device of claim 9, wherein said receive mechanism includes a sequencer.

11. The device of claim 9, further comprising a queue manager containing logic circuits to provide information for said second processor.

12. The device of claim 9, wherein said receive mechanism and said second processor process a plurality of message packets to send data from each of said packets to said destination without an interrupt.

13. The device of claim 9, wherein the connection is one of a plurality of TCP connections maintained by the device, and a hash that indicates each said connection is stored in a memory of the device.

14. The device of claim 13, further comprising a least recently used register (LRU) for determining which of said connections are stored in said memory.

15. The device of claim 9, wherein said receive mechanism has a sequence of hardware logic units for processing said header.

16. The device of claim 9, further comprising a direct memory access (DMA) controller for sending, based upon said connection, said data to said first application without said header.

17. The device of claim 9, further comprising directions for said second processor to transmit a second message packet from the first apparatus to the second apparatus without employing the stack, including directions to create a header corresponding to said connection as part of said second message packet.

18. A method for communication between a first device and a second device, the method comprising:

establishing, by a processor of the first device, a Transmission Control Protocol (TCP) connection corresponding to an application running on the first device;

transferring Media Access Control (MAC) and Internet Protocol (IP) addresses corresponding to the TCP connection from the processor to an interface for the first device, and transferring control of the TCP connection from the processor to the interface;

receiving a message packet by the interface, including parsing a header of the packet with hardware of the interface and determining that the packet corresponds to the TCP connection;

sending to the application, by the interface, data of the packet without the header; and

updating the TCP connection, by the interface, to reflect receipt of the packet.

19. The method of claim 18, further comprising creating, by the interface, an acknowledgement that corresponds to the TCP connection and indicates that the data was received by the application.

20. The method of claim 18, further comprising advertising to the second device, by the interface, a receive window of space in memory that corresponds to the TCP connection and is available to store additional data for the application.

21. The method of claim 18, further comprising transmitting, by the interface, a second message packet, including prepending second data from the application with a second header corresponding to the TCP connection.

22. The method of claim 18, wherein determining that the packet corresponds to the TCP connection includes comparing, with the hardware of the interface, TCP ports of the packet with those of the TCP connection.