Partitioning data for error correction
First Claim
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1. A method of writing to a plurality of memory devices of the same width of a memory system, the method comprising:
- receiving a code word for storage in the memory system;
partitioning the code word into a plurality of nibbles, each nibble having a width equal to the width of each of the plurality of memory devices; and
storing the code word into the plurality of memory devices by storing a plurality of successive nibbles of the code word into a plurality of corresponding address lines in each of the plurality of memory devices.
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Abstract
Reading and writing data from a plurality of memory devices. A code word having a plurality of bits is partitioned into nibbles. Adjacent nibbles are stored on a common physical medium. The failure of the common physical medium results in errors in adjacent nibbles of a reconstructed code word.
51 Citations
19 Claims
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1. A method of writing to a plurality of memory devices of the same width of a memory system, the method comprising:
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receiving a code word for storage in the memory system; partitioning the code word into a plurality of nibbles, each nibble having a width equal to the width of each of the plurality of memory devices; and storing the code word into the plurality of memory devices by storing a plurality of successive nibbles of the code word into a plurality of corresponding address lines in each of the plurality of memory devices. - View Dependent Claims (2, 3, 4)
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5. A method of reading from a plurality of memory devices of the same width of a memory system, the method comprising:
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a. reading a plurality of chunks of data from a plurality of corresponding address lines in each of the plurality of memory devices, each chunk comprising a nibble from each of the plurality of memory devices having a width equal to the width of the corresponding memory device; and b combining the nibbles from the plurality of chunks to generate a code word where the nibbles from each of the plurality of memory devices are adjacent in the code word. - View Dependent Claims (6, 7, 8)
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9. A memory system comprising:
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a. a plurality of memory devices having a width of MD bits; b. a data buffer for reading chunks of MD bits from and writing chunks of MD bits to an address line in the memory devices; c. a data separator for receiving a code word of CW bits, separating the code word into a plurality of chunks each comprising a plurality of sequential nibbles having widths corresponding to the width of at least one of the plurality of memory devices, partitioning the nibbles into groups of M adjacent nibbles where M is a value equaling CW divided by MD, and generating M chunks of bits, each chunk having only one nibble from each group of M nibbles where nibbles of each group are in the same relative position in their respective chunks; and d. a data combiner for generating a code word from M chunks received from the data buffer by separating the M chunks into a plurality of nibbles having widths corresponding to at least one of the memory devices and arranging M nibbles having the same relative position in their respective chunks adjacent to each other in the code word. - View Dependent Claims (10, 11, 12, 13, 14, 15)
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16. A computer readable media comprising computer readable code for instructing a computer to write data into a plurality of memory devices of the same width of a memory system comprising:
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receiving a code word for storage in the memory system; partitioning the code word into a plurality of nibbles, each nibble having a width equal to the width of each of the plurality of memory devices; and storing the code word into the plurality of memory devices by storing a plurality of successive nibbles of the code word into a plurality of corresponding address lines in each of the plurality of memory devices.
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17. A computer readable media comprising computer readable code for instructing a computer to read data from a plurality of memory devices of the same width of a memory system comprising:
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reading a plurality of chunks of data from a plurality of corresponding address lines in each of the plurality of memory devices, each chunk comprising a nibble from each of the plurality of memory devices having a width equal to the width of the corresponding memory device; and combining the nibbles from the plurality of chunks to generate a code word where the nibbles from each of the plurality of memory devices are adjacent in the code word.
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18. A system for writing data to a plurality of memory devices of the same width in a memory system comprising:
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a module for receiving a code word for storage in the memory system; a data separator for partitioning the code word into a plurality of nibbles, each nibble having a width equal to the width of each of the plurality of memory devices; and a buffer for storing the code word into the plurality of memory devices by storing a plurality of successive nibbles of the code word into a plurality of corresponding address lines in each of the plurality of memory devices.
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19. A system for reading data from a plurality of memory devices of the same width of a memory system comprising:
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a buffer for reading a plurality of chunks of data from a plurality of corresponding address lines in each of the plurality of memory devices, each chunk comprising a nibble from each of the plurality of memory devices having a width equal to the width of the corresponding memory device; and a data combiner for combining the nibbles from the plurality of chunks to generate a code word where the nibbles from each of the plurality of memory devices are adjacent in the code word.
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Specification